| PART |
Description |
Maker |
| T74LS113AD1 T74LS113AC1 T74LS113AM1 T74LS113AB1 |
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14 CERAMIC, DIP-14
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC20 PLASTIC, LCC-20
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 MICRO, SO-14
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14 PLASTIC, DIP-14
|
ST Microelectronics
|
| 74LV107 74LV107D 74LV107DB 74LV107N 74LV107PW 74LV |
CLP SINE LV/LV-A/LVX/H SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
Dual JK flip-flop with reset; negative-edge trigger
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| HD74ACT112 HD74AC112 |
Dual JK Negative Edge-Triggered Flip-Flop
|
HITACHI[Hitachi Semiconductor]
|
| 74F112PC 74F112SC 74F112SJ 74F112 |
Dual JK Negative Edge-Triggered Flip-Flop
|
FAIRCHILD[Fairchild Semiconductor]
|
| SN54_74LS113A ON2810 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
From old datasheet system
|
ON Semi
|
| 54LS76A/BDAJC |
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14
|
MOTOROLA INC
|
| MC74HC107DR2 |
HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
MOTOROLA INC
|
| 74LCX112MTC |
Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
|
ON Semiconductor
|
| 5962F9670401VXC 5962F9670401VEC |
Radiation Hardened Dual J-K Flip-Flop AC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16
Radiation Hardened Dual J-K Flip-Flop AC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
|
Intersil, Corp.
|
| DM74LS73A DM74LS73AN 74LS73 74LS73A DM74LS73AM |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
|
Fairchild Semiconductor Corporation
FAIRCHILD[Fairchild Semiconductor]
|
| 74F114SC 74F114 74F114PC |
双JK负沿触发器与普通时钟和清除拖鞋
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears
From old datasheet system
|
锁存
FAIRCHILD[Fairchild Semiconductor]
|
| DM74S112 74S112 |
From old datasheet system
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
|
Fairchild Semiconductor
|
