| PART |
Description |
Maker |
| 5962-9306501HYC 5962-9306501HYA 5962-9306515HXC 59 |
Precision, Quad, SPST Analog Switches
Low-Voltage, Quad, SPDT, CMOS Analog Switch—Replaces MAX333A
High-Voltage, Fault-Protected Analog Multiplexers
2.488Gbps/2.67Gbps 1:4 Demultiplexer with Clock and Data Recovery and Limiting Amplifier
3.3V, 2.5Gbps/2.7Gbps, SDH/SONET 4:1 Serializer with Clock Synthesis
3.3V, 2.5Gbps, SDH/SONET 16:1 Serializer with Clock Synthesis and LVDS Inputs
Low-Power, Compact 2.5Gbps/2.7Gbps Clock-Recovery and Data-Retiming IC
MIL-STD-1553/ARINC Bus Controller/RTU MIL-STD-1553/ARINC总线控制 RTU通讯
Precision, Low-Voltage, SPST CMOS Analog Switch MIL-STD-1553/ARINC总线控制 RTU通讯
2.7Gbps Laser Driver with Modulation Compensation MIL-STD-1553/ARINC总线控制 RTU通讯
|
Richtek Technology, Corp.
TE Connectivity, Ltd.
|
| IDT5T9050PGI IDT5T9050 |
2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFERJR 2.5V的单数据传输速率1:5时钟缓冲器TERABUFFER⑩JR
2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER⑩ JR
2.5V Single Data Rate 1:5 Clock Buffer Terabuffer Jr.
|
Integrated Device Technology, Inc.
IDT[Integrated Device Technology]
|
| SY87700L SY87700LHITR |
3.3V 32-175Mbps AnyRate??CLOCK AND DATA RECOVERY
3.3V 32-175Mbps AnyRateCLOCK AND DATA RECOVERY
3.3V 32-175Mbps AnyRate CLOCK AND DATA RECOVERY Use lower-power SY87700AL for new designs
|
Micrel Semiconductor,Inc.
MICREL[Micrel Semiconductor]
|
| M13S2561616A-2A |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| SH713609 SH7137 |
SCI Clock Synchronous Simultaneous Transmit and Receive of Serial Data and DTC Data Transfer
|
Renesas Electronics Corporation
|
| NB6L572M NB6L572MMNG NB6L572MMNR4G |
6L SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC32
2.5V / 3.3V Differential 4:1 Mux to 1:2 CML Clock/Data Fanout / Translator
2.5V / 3.3V Differential 4:1 Mux to 1:2 CML Clock/Data Fanout / Translator
|
ON Semiconductor
|
| W9412G6JH W9412G6JH-5 |
2M ?4 BANKS ?16 BITS DDR SDRAM
Double Data Rate architecture; two data transfers per clock cycle
|
Winbond
|
| W972GG6JB W972GG6JB-25 |
16M ?8 BANKS ?16 BIT DDR2 SDRAM
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
| NB6L11 NB6L11DTR2 NB6L11D NB6L11DR2 NB6L11DT |
2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1:2 CLOCK OR DATA FANOUT BUFFER / TRANSLATOR 6L SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
6GHz 2.5V/3.3V Multilevel Input to Differential LVNECL/LVPECL 1:2 Clock or Data Fanout Buffer/Transl
From old datasheet system
|
ONSEMI[ON Semiconductor]
|
| NB4N840M |
3.3V 2.7Gb/s Dual Differential Clock/Data 2 x 2 Crosspoint Switch with CML Output and Internal Termination(带CML输出和内部终端的3.3V2.7Gb/s双差分时数据2x2交点开 3.3 2.7Gb / s双差分时带CML输出和内部终端（带白血病输出和内部终端.3伏，2.7Gb /数据2 × 2交叉点开关S双差分时数据2X2的交点开关）
|
ON Semiconductor
|
| SY87721LHITR SY87721LHY SY87721LHYTR SY87721L08 |
CLOCK AND DATA RECOVERY WITH INTEGRATED CLOCK MULTIPLIER UNIT
|
Micrel Semiconductor
|
| TSM600-250 |
The SY87702L is a complete Clock Recovery and Data
retiming integrated circuit for data rates from 28Mbps up to
2.5Gbps NRZ.
PolySwitch PTC Devices Overcurrent Protection Device
|
MACOM
Tyco Electronics
|
