| PART |
Description |
Maker |
| PDU54-1500 PDU54-2000 PDU54-1200M PDU54-1200MC4 PD |
Delay 1500 /-200 ns, 4-BIT, ECL-interfaced programmable delay line
Delay 2000 /-400 ns, 4-BIT, ECL-interfaced programmable delay line
Delay 1200 /-200 ns, 4-BIT, ECL-interfaced programmable delay line
Delay 1000 /-200 ns, 4-BIT, ECL-interfaced programmable delay line
Delay 200 /-60 ns, 4-BIT, ECL-interfaced programmable delay line
Delay 100 /-50 ns, 4-BIT, ECL-interfaced programmable delay line
|
Data Delay Devices Inc
|
| MC100EP16VA MC100EP17 MC100EP29 MC100EP35 MC100EP4 |
3.3V / 5V ECL Differential Receiver/Driver with High Gain
3.3V / 5V ECL Quad Differential Driver/Receiver
3.3V / 5V ECL Dual Differential Data and Clock D Flip?Flop With Set and Reset
3.3V / 5V ECL JK Flip?Flop
3.3V/5V ECL 8?Bit Serial/Parallel Converter
3.3V / 5V ECL Differential Data and Clock D Flip?Flop
3.3V / 5V ECL 4:1 Differential Multiplexer
3.3V / 5V ECL 2:1 Multiplexer
9?Bit TTL to ECL Translator
3.3V / 5V ECL 8?Bit Synchronous Binary Up Counter
3.3V / 5V ECL 2?Input Differential AND/NAND
3.3V / 5V ECL Quad 4?Input OR/NOR
3.3V / 5V ECL Quad 2?Input Differential AND/NAND
3.3 V / 5 V Hex Differential Line Receiver/Driver
3.3V / 5V ECL 1:2 Differential Fanout Buffer
3.3V / 5V ECL 卤2/4, 卤4/5/6 Clock Generation Chip
3.3V / 5V ECL Differential Receiver/Driver with Internal Termination
3.3V ECL Programmable Delay Chip
3.3V / 5V ECL D Flip?Flop with Set and Reset
3.3V / 5V ECL 卤2 Divider
3.3V / 5V ECL 卤4 Divider
3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter
3.3V / 5V ECL 6?Bit Differential Register with Master Reset
3.3V / 5V ECL D Flip?Flop with Reset and Differential Clock
3.3V / 5V ECL Dual Differential 2:1 Multiplexer
3.3V / 5V ECL Coaxial Cable Driver
?3.3V / ?5V Triple ECL Input to LVPECL/PECL Output Translator
3.3V LVTTL/LVCMOS to Differential LVPECL Translator
|
ONSEMI[ON Semiconductor]
|
| PDU53SERIES PDU53-1000 PDU53-100MC3 PDU53-1000C3 P |
Delay 1200 /-200 ns, 3-BIT, ECL-interfaced programmable delay line
Delay 100 /-50 ns, 3-BIT, ECL-interfaced programmable delay line
Delay 1000 /-200 ns, 3-BIT, ECL-interfaced programmable delay line
3-BIT. ECL-INTERFACED PROGRAMMABLE DELAY LINE
|
Data Delay Devices Inc
|
| PDU1016H-100 PDU1016H-60 PDU1016H-40 PDU1016HSERIE |
ACTIVE DELAY LINE, TRUE OUTPUT, PDIP13
4-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE 4位，经过ECL接口可编程延迟线
KPT 2C 2#20 SKT PLUG 4位，经过ECL接口可编程延迟线
4-BIT. ECL-INTERFACED PROGRAMMABLE DELAY LINE
CONNECTOR ACCESSORY
|
DATA DELAY DEVICES INC
Electronic Theatre Controls, Inc.
|
| MC100H646 MC100EP445FA MC100E156FNR2 MC100EPT22D M |
PECL/TTL-TTL 1:8 Distribution Chip
3.3V / 5VECL 8-Bit Serial/Parallel Converter
5V ECL 3-Bit 4:1 Mux-Latch
3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V / 5V 2-Input Differential AND/NAND
3.3V / 5V ECL ÷2 Divider
5V ECL Divide by 2, Divide by 4/6 Clock Generation Chip
5V ECL Low Impedance Driver
|
ON Semiconductor
|
| MC100EP80906 MC100EP809FAG MC100EPT2106 MC74VHCT02 |
Inverting Octal Bus Buffer; Package: SOEIAJ-20; No of Pins: 20; Container: Rail; Qty per Container: 40 AHCT/VHCT SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20
PNP DIGITAL TRANSISTOR (BULT-IN RESISTORS)
3.3V ECL Programmable Delay Chip with FTUNE
5V ECL 8-Bit Scannable Register
3.3V ECL Phase?Frequency Detector
Noninverting Buffer / CMOS Logic Level Shifter with LSTTL?Compatible Inputs
Octal D?Type Flip?Flop with 3?State Output
Octal D?Type Latch with 3?State Output
8?Bit Addressable Latch/1?of?8 Decoder CMOS Logic Level Shifter with LSTTL?Compatible Inputs
Octal Bus Transceiver
Quad 2?Channel Multiplexer
Hex Schmitt Inverter
Dual 2?to?4 Decoder/ Demultiplexer
3?to?8 Line Decoder
Quad 2?Input NAND Schmitt Trigger
Quad 2?Input AND Gate
Hex Inverter
Quad 2?Input NOR Gate
3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator
3.3V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
|
ONSEMI[ON Semiconductor]
UTC
|
| PDU1016H-8MC4 PDU1016H-.5C4 PDU1016H-100C4 PDU1016 |
4-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE
|
DATADELAY[Data Delay Devices, Inc.]
|
| MC10H109FNR2 MC10H131 MC100EP140 MC100E155FN MC100 |
Dual 4-5-Input OR/NOR Gate
Dual Type D Master-Slave Flip-Flop
3.3V ECL Phase-Frequency Detector
5V ECL 6-Bit 2:1 Mux Latch
5V ECL Differential Data and Clock D Flip-Flop
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
ECL/TTL Clock Driver
3.3V / 5V 2-Input Differential AND/NAND
5V ECL 2:1 Multiplexer
3.3V / 5V ECL JK Flip Flop
3.3V ECL 1:4 ÷ 1/÷ 2 Clock Fanout Buffer
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
Dual 2-Bit Adder/Subtractor
|
ON Semiconductor
|
| PDU10256H PDU10256H-.5 PDU10256H-.5C5 PDU10256H-1 |
8-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU10256H)
|
DATADELAY[Data Delay Devices, Inc.]
|
| PDU10256H-6MC5 PDU10256H-3M PDU10256H-1MC5 PDU1025 |
8-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU10256H) ACTIVE DELAY LINE, TRUE OUTPUT, DSO40
8-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU10256H) ACTIVE DELAY LINE, TRUE OUTPUT, DIP20
|
Data Delay Devices, Inc.
DATA DELAY DEVICES INC
|
| M4A3-256/128-7FANI M4A3-256/128-7FANC M4-192/96-14 |
EE PLD, 7.5 ns, PQFP100 LEAD FREE, TQFP-100
EE PLD, 7.5 ns, PQFP48 1.40 MM HEIGHT, LEAD FREE, TQFP-48
High Performance E 2 CMOS In-System Programmable Logic EE PLD, 12 ns, PQFP44
EE PLD, 10 ns, PBGA256 LEAD FREE, FPBGA-256
EE PLD, 5 ns, PQFP48 1.40 MM HEIGHT, LEAD FREE, TQFP-48
High Performance E 2 CMOS In-System Programmable Logic EE PLD, 7.5 ns, PQFP100
High Performance E 2 CMOS In-System Programmable Logic EE PLD, 7.5 ns, PQFP144
EE PLD, 6 ns, PQFP144 LEAD FREE, TQFP-144
EE PLD, 7.5 ns, PQFP144 LEAD FREE, TQFP-144
High Performance E 2 CMOS In-System Programmable Logic EE PLD, 5 ns, PQCC44
EE PLD, 7.5 ns, PQCC44 LEAD FREE, PLASTIC, LCC-44
High Performance E 2 CMOS In-System Programmable Logic EE PLD, 5 ns, PQFP48
MACH4 ISP EEPLD, SMD, TQFP100, 3.3V; Logic IC family:Programmable; Logic IC function:Programmable ISP; Voltage, supply:3.3V; Case style:TQFP / 100; Base number:4; I/O lines, No. of:64; Logic function number:M4; Macrocells, No. RoHS Compliant: Yes
EE PLD, 12 ns, PQFP100
|
Lattice Semiconductor Corporation
Lattice Semiconductor, Corp.
|
| QL5020 |
33 MHz/32-bit PCI with Embedded Programmable Logic
|
quicklogic
|
