| PART |
Description |
Maker |
| ASM5I2304AF-1-08-SR ASM5I2304AG-1-08-SR ASM5P2304A |
2304 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
3.3V Zero Delay Buffer
|
ON SEMICONDUCTOR
PulseCore Semiconductor
|
| 1504 1504SERIES 1504-600F 1504-80B 1504-80C 1504-7 |
FIXED DIP DELAY LINE TD/TR = 5
Delay 20 /-1.0 ns, Fixed dip delay line Td/Tr=5
Delay 60 /-3 ns, Fixed dip delay line Td/Tr=5
Delay 800 /-40 ns, Fixed dip delay line Td/Tr=5
Delay 40 /-2 ns, Fixed dip delay line Td/Tr=5
Delay 400 /-20 ns, Fixed dip delay line Td/Tr=5
Delay 750 /-37.5 ns, Fixed dip delay line Td/Tr=5
Delay 225 /-12 ns, Fixed dip delay line Td/Tr=5
Delay 140 /-7 ns, Fixed dip delay line Td/Tr=5
Delay 100 /-5 ns, Fixed dip delay line Td/Tr=5
Delay 220 /-11 ns, Fixed dip delay line Td/Tr=5
Delay 380 /-19 ns, Fixed dip delay line Td/Tr=5
Delay 480 /-24 ns, Fixed dip delay line Td/Tr=5
Delay 120 /-6 ns, Fixed dip delay line Td/Tr=5
Delay 150 /-7.5 ns, Fixed dip delay line Td/Tr=5
Delay 450 /-22.5 ns, Fixed dip delay line Td/Tr=5
Delay 75 /-3.8 ns, Fixed dip delay line Td/Tr=5
Delay 360 /-18 ns, Fixed dip delay line Td/Tr=5
Delay 25 /-1.3 ns, Fixed dip delay line Td/Tr=5
Delay 250 /-12.5 ns, Fixed dip delay line Td/Tr=5
Fixed passive DIP delay line
PASSIVE DELAY LINE, TRUE OUTPUT, DIP16
Delay 160 /-8 ns, Fixed dip delay line Td/Tr=5
Delay 375 /-18.8 ns, Fixed dip delay line Td/Tr=5
Delay 50 /-2.5 ns, Fixed dip delay line Td/Tr=5
Delay 320 /-16 ns, Fixed dip delay line Td/Tr=5
Delay 90 /-4.5 ns, Fixed dip delay line Td/Tr=5
Delay 45 /-2.3 ns, Fixed dip delay line Td/Tr=5
Delay 1000 /-50 ns, Fixed dip delay line Td/Tr=5
Delay 10 /-1 ns, Fixed dip delay line Td/Tr=5
Delay 125 /-6.3 ns, Fixed dip delay line Td/Tr=5
Delay 30 /-1.5 ns, Fixed dip delay line Td/Tr=5
Delay 180 /-9 ns, Fixed dip delay line Td/Tr=5
Delay 500 /-25 ns, Fixed dip delay line Td/Tr=5
Delay 300 /-15 ns, Fixed dip delay line Td/Tr=5
Delay 200 /-10 ns, Fixed dip delay line Td/Tr=5
Delay 240 /-12 ns, Fixed dip delay line Td/Tr=5
Delay 80 /-4 ns, Fixed dip delay line Td/Tr=5
Delay 600 /-30 ns, Fixed dip delay line Td/Tr=5
|
Data Delay Devices, Inc...
DATA DELAY DEVICES INC
|
| ICS672M-02I ICS672M-02T ICS672-01 ICS672M-01 ICS67 |
QuadraClockQuadrature Delay Buffer QuadraClock⑩正交延迟缓冲器
QuadraClock?/a> Quadrature Delay Buffer
QuadraClock Quadrature Delay Buffer
QuadraClock⑩ Quadrature Delay Buffer
|
ICST[Integrated Circuit Systems]
|
| 1514 1514-22.5Y 1514-135Y 1514-2.5A 1514-130D 1514 |
Delay 50 /-2.5 ns, fixed SIP delay line Td/Tr=5
Delay 60 /-3 ns, fixed SIP delay line Td/Tr=5
Delay 45 /-2.3 ns, fixed SIP delay line Td/Tr=5
Delay 40 /-2 ns, fixed SIP delay line Td/Tr=5
Delay 270 /-13.5 ns, fixed SIP delay line Td/Tr=5
Delay 25 /-1.3 ns, fixed SIP delay line Td/Tr=5
Delay 170 /-8.5 ns, fixed SIP delay line Td/Tr=5
Delay 120 /-6 ns, fixed SIP delay line Td/Tr=5
Delay 10 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 90 /-4.5 ns, fixed SIP delay line Td/Tr=5
Delay 70 /-3.5 ns, fixed SIP delay line Td/Tr=5
Delay 130 /-6.5 ns, fixed SIP delay line Td/Tr=5
Delay 135 /-6.8 ns, fixed SIP delay line Td/Tr=5
PASSIVE DELAY LINE, TRUE OUTPUT, PSIP4
Fixed passive SIP delay line
Delay 2.5 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 3.5 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 100 /-5 ns, fixed SIP delay line Td/Tr=5
Delay 105 /-5.3 ns, fixed SIP delay line Td/Tr=5
Delay 140 /-7 ns, fixed SIP delay line Td/Tr=5
Delay 150 /-7.5 ns, fixed SIP delay line Td/Tr=5
Delay 15 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 20 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 22.5 /-1.2 ns, fixed SIP delay line Td/Tr=5
Delay 30 /-1.5 ns, fixed SIP delay line Td/Tr=5
Delay 37.5 /-1.9 ns, fixed SIP delay line Td/Tr=5
Delay 80 /-4 ns, fixed SIP delay line Td/Tr=5
Delay 7.5 /-1 ns, fixed SIP delay line Td/Tr=5
|
DATA DELAY DEVICES INC
|
| CY23S02SI-1 CY23S02SI-1T CY23S02SXI-1 CY23S02SXI-1 |
Spread Aware? Frequency Multiplier and Zero Delay Buffer
Spread Aware⑩, Frequency Multiplier and Zero Delay Buffer
Spread Aware垄芒, Frequency Multiplier and Zero Delay Buffer
|
Cypress Semiconductor
|
| CY23S05 CY23S09ZC-1 CY23S09ZC-1H CY23S09SC-1 CY23S |
Low-Cost 3.3V Spread Aware?/a> Zero Delay Buffer
Low-Cost 3.3V Spread Aware Zero Delay Buffer
Low-Cost 3.3V Spread AwareZero Delay Buffer
Low-Cost 3.3V Spread Aware⑩ Zero Delay Buffer
Low-cost Spread Aware(TM) Zero Delay Buffer
|
Cypress Semiconductor Corp.
CYPRESS[Cypress Semiconductor]
|
| IDT23S09E-1PGI IDT23S09E-1HPG IDT23S09E-1HDC IDT23 |
3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE 23S SERIES, PLL BASED CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE 3.3零延迟时钟缓冲器，扩频兼
|
Integrated Device Technology, Inc.
|
| 2020-900 2020-1400 2021-200 2021-250 2020-700 2021 |
Delay 900 /-18 ns, fixed SIP delay line Tr
Delay 1400 /-28 ns, fixed SIP delay line Tr
Delay 200 /-10 ns, fixed SIP delay line Tr
Delay 250 /-10 ns, fixed SIP delay line Tr
Delay 700 /-14 ns, fixed SIP delay line Tr
Delay 100 /-10 ns, fixed SIP delay line Tr
Delay 150 /-10 ns, fixed SIP delay line Tr
Delay 500 /-10 ns, fixed SIP delay line Tr
Delay 1300 /-26 ns, fixed SIP delay line Tr
|
Data Delay Devices Inc
|
| CY23EP05SXI-1T CY23EP05SXC-1HT CY23EP05SXI-1HT CY2 |
2.5 V or 3.3 V,10-220-MHz, Low Jitter, 5 Output Zero Delay Buffer
2.5V or 3.3V,10- 220 MHz, Low Jitter, 5 Output Zero Delay Buffer 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
Cypress Semiconductor, Corp.
|
| UPD424280LLE-A80 UPD424280LLE-A70 UPD424280AG5M-80 |
x18 Fast Page Mode DRAM
Quad PLL Clock Generator with Serial Interface (I2C)
Low-Cost 3.3V Spread Aware™ Zero Delay Buffer
MediaClock™ MPEG Clock Generator with VCXO
MediaClock™ PDP Clock Generator
Field and Factory-Programmable Spread Spectrum Clock Generator for EMI Reduction
HOTLink II™ SMPTE Receiver Training Clock
3.3V Zero Delay Buffer x18快速页面模式的DRAM
|
|
| W132 |
Spread Aware/ Ten/Eleven Output Zero Delay Buffer
From old datasheet system
Spread Aware, Ten/Eleven Output Zero Delay Buffer
|
Cypress Semiconductor
|
| ASM5I2304A |
3.3 V Zero Delay Buffer
|
Alliance Semiconductor
|
|
