| PART |
Description |
Maker |
| AF2301P AF2301PW AF2301PWA AF2301PWLA AF2301PWL |
V(ds): -20V; V(gs): -8V; -2.3A; 20V P-channel enchancement mode MOSFET
20V P-Channel Enhancement Mode MOSFET
Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:21-41 RoHS Compliant: No
MS27467T21B41S
|
Anachip Corp
ETC
|
| IRF3704 IRF3704L IRF3704S IRF3704STRL IRF3704STRR |
20V Single N-Channel HEXFET Power MOSFET in a D2-Pak package
20V Single N-Channel HEXFET Power MOSFET in a TO-262 package
20V Single N-Channel HEXFET Power MOSFET in a TO-220AB package
Power MOSFET(Vdss=20V, Rds(on)max=9.0mohm, Id=77A?
Power MOSFET(Vdss=20V, Rds(on)max=9.0mohm, Id=77A)
Power MOSFET(Vdss=20V Rds(on)max=9.0mohm Id=77A)
Power MOSFET(Vdss=20V, Rds(on)max=9.0mohm, Id=77A?)
Power MOSFET(Vdss=20V/ Rds(on)max=9.0mohm/ Id=77A)
CONNECTOR, PICOFLEX, 4WAY; Connector type:Wire-to-Board; Ways, No. of:4; Termination method:Crimp; Rows, No. of:2; Pitch:1.27mm; Series:91935 RoHS Compliant: Yes 功率MOSFET（减振钢板基本\u003d 20V的，的Rds（on）最大值\u003d 9.0mohm，身份证\u003d 77A条?
TRANSISTOR | MOSFET | N-CHANNEL | 20V V(BR)DSS | 77A I(D) | TO-263AB
|
IRF[International Rectifier]
International Rectifier, Corp.
|
| ECH8668 |
Power MOSFET, 20V, 7.5A, 17mOhm, -20V, -5A, 38mOhm, Complementary Dual ECH8
|
ON Semiconductor
|
| ITF87068SQT |
9A, 20V, 0.015 Ohm, P-Channel, 2.5V Specified Power MOSFET(9A, 20V, 0.015Ω P沟道2.5V专用功率MOS场效应管)
|
Intersil Corporation
|
| MIC2230-GFHYML MIC2230-GSYML MIC2230-SSYML MIC2230 |
Dual Synchronous 800mA/800mA Step-Down DC/DC Regulator
1.8 A SWITCHING REGULATOR, 2875 kHz SWITCHING FREQ-MAX, PDSO12
Dual Synchronous DC/DC Regulator
|
Micrel Semiconductor
MICREL INC
|
| SSI2154 SSI2154-15 |
800mA 20V Dual N-Channel MOSFET
Dual N-Channel MOSFET
|
SeCoS Halbleitertechnologie
SeCoS Halbleitertechnologie GmbH
SeCoS Halbleitertechnol...
|
| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
|
Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
| LT1117IST-2.85 LT1117IST-5 LT1117IST-3.3 LT1117-5 |
800mA Low Dropout Positive Regulators Adjustable and Fixed 2.85V,3.3V, 5V; Package: SOT; No of Pins: 3; Temperature Range: -40°C to 85°C 2.85 V FIXED POSITIVE LDO REGULATOR, 1.3 V DROPOUT, PDSO4
800mA Low Dropout Positive Regulators Adjustable and Fixed 2.85V,3.3V, 5V; Package: DD PAK; No of Pins: 3; Temperature Range: 0°C to 70°C 5 V FIXED POSITIVE LDO REGULATOR, 1.2 V DROPOUT, PSSO3
800mA Low Dropout Positive Regulators Adjustable and Fixed 5V(800mA，低压差固定5V）正输出稳压
THREE-TERMINAL POSITIVE FIXED VOLTAGE REGULATORS
|
Linear Technology, Corp.
Linear Technology Corporation
|
| CDBK0520L |
Small Signal Schottky Diodes, V-RRM=20V, V-R=20V, I-O=500mA
SMD Schottky Barrier Diode
|
Comchip Technology
|
| BSR13T/R BSR14T/R |
TRANSISTOR | BJT | NPN | 30V V(BR)CEO | 800MA I(C) | SOT-23
TRANSISTOR | BJT | NPN | 40V V(BR)CEO | 800MA I(C) | SOT-23 晶体管|晶体管|叩| 40V的五（巴西）总裁| 800mA的一（c）| SOT - 23封装
|
Advanced Semiconductor, Inc.
|
|
