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Integrated Device Technology, Inc.
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Part No. |
ICSSSTUAF32869AHLF
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OCR Text |
...n the industry-standard ddr2 re gister with parity (in jedec definition). configuration inputs c1 sstl_18 when low, the register is configured as register 1. when high, the register is configured as register 2. clock inputs clk, clk sst... |
Description |
14-BIT CONFIGURABLE REgisterED BUFFER FOR DDR2
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File Size |
418.30K /
21 Page |
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http://
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Part No. |
ATTINY10
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OCR Text |
...ations. note that the status re gister is updated after all alu operations, as specified in document ?avr instruction set? and section ?instruction set summary? on page 151 . this will in many cases remove the need fo r using the dedicated... |
Description |
8-bit Microcontroller with 512/1024 Bytes In-System Programmable Flash
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File Size |
4,023.68K /
168 Page |
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http:// INTEGRATED DEVICE TECHNOLOGY INC
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Part No. |
MPC9230 MPC9230FN
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OCR Text |
...pture the value of the shift re gister on the high-to-low edge of the s_load inpu t. see the programming section for more infor mation. the test output reflects various internal node values, and is contro lled by the t[2:0] bits in the se... |
Description |
800MHz Low Voltage PECL Clock Synthesizer 750 MHz, OTHER CLOCK GENERATOR, PQCC28
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File Size |
783.53K /
16 Page |
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INTERSIL CORP http://
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Part No. |
X4323 X4325V8-4.5A
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OCR Text |
...005 the state of the control re gister can be read at any time by performing a random read at address ffffh. only one byte is read by each register read operation. the x4323/5 resets itself after the first byte is read. the master should su... |
Description |
RTC Module With CPU Supervisor CPU Supervisor with 32K EEPROM
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File Size |
323.05K /
21 Page |
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it Online |
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http://
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Part No. |
AMIS-30521
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OCR Text |
...of the ?dir? (= directi on) re gister or inp u t pin. t he chip p rovi des a so-call ed ?sp e e d and l oad a n g l e? outp u t. t h is allo w s the cr eat io n of stall d e tection a l g o rithms and co ntrol loo p s bas ed on l... |
Description |
Micro-stepping Motor Driver
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File Size |
823.64K /
26 Page |
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http://
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Part No. |
AMIS-30522
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OCR Text |
... th e ?dir? (= dire c t ion) re gister or inp u t pin. t he chip provi des a so-call ed ?s pe ed a nd l o a d a n g le? output. t h is allo w s the cre a tion of stal l d e tection al g o rit h ms and c ontr o l lo ops b a se d ... |
Description |
Micro-stepping Motor Driver
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File Size |
869.37K /
28 Page |
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http://
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Part No. |
XRT86VX38IB256
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OCR Text |
...gnaling and data link select re gister (tsdlsr) hex address:0xn10a 23 framing control register (fcr) hex address: 0xn10b 26 receive signaling & data link... |
Description |
8-CHANNEL T1/E1/J1 FRAMER/LIU COMBO - E1 REgister DESCRIPTION
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File Size |
836.66K /
185 Page |
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http://
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Part No. |
OX12PCI840 OX12PCI840-PQAG
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OCR Text |
...al configuration and control re gister ?lcc? (offset 0x00) ........................................................ 12 4.4.2 multi-purpose i/o configuration register ?mic? (offset 0x04) .................................................... |
Description |
Integrated Parallel Port and PCI interface
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File Size |
275.59K /
33 Page |
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it Online |
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http://
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Part No. |
SAK-XC167CI-32F40F
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OCR Text |
...tes on-chip special function re gister area (c166 family compatible) ? 16-priority-level interrupt system with 77 sources, sample-rate down to 50 ns ? 8-channel interrupt -driven single-cycle data transfer facilities via peripheral event... |
Description |
16-Bit Single-Chip Microcontroller with C166SV2 Core
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File Size |
902.06K /
90 Page |
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it Online |
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