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Samsung Electronic
SAMSUNG[Samsung semiconductor]
SAMSUNG SEMICONDUCTOR CO. LTD.
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| Part No. |
M470L3224BT0 M470L3224BTO
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| OCR Text |
...K=100Mhz for DDR200, 133Mhz for ddr266a & DDR266B; DQ,DM and DQS inputs changing twice per clock cycle; address and control inputs changing once per clock cycle Operating current - One bank operation ; One bank open, BL=4, Reads - Refer to ... |
| Description |
32Mx64 200pin DDR SDRAM SODIMM based on 32Mx8 Data Sheet
256MB DDR SDRAM MODULE
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| File Size |
125.20K /
14 Page |
 View
it Online |
Download Datasheet
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Elixir
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| Part No. |
N2DS12H16CT
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| OCR Text |
... 3 200 166 133 * -6K also meets ddr266a Spec (MHz-CL-t RCD-tRP = 133-2.5-3-3) CAS Latency
* * * * * * * * * * * * * * *
* Double data rate architecture: two data transfers per clock cycle * Bidirectional data strobe (DQS) is transmitt... |
| Description |
128Mb DDR SDRAM
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| File Size |
2,329.49K /
74 Page |
View
it Online |
Download Datasheet |
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Samsung Electronic
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| Part No. |
M470L0914BT0
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| OCR Text |
...k=100mhz for ddr200, 133mhz for ddr266a & ddr266b; dq,dm and dqs inputs changing twice per clock cycle; address and control inputs changing once per clock cycle idd0 - - operating current - one bank operation ; one bank open, bl=4, reads ... |
| Description |
8Mx64 200pin DDR SDRAM SODIMM based on 8Mx16 Data Sheet
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| File Size |
120.83K /
14 Page |
View
it Online |
Download Datasheet |
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Samsung Electronic
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| Part No. |
M470L1624BT0
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| OCR Text |
...k=100mhz for ddr200, 133mhz for ddr266a & ddr266b; dq,dm and dqs inputs changing twice per clock cycle; address and control inputs changing once per clock cycle idd0 - - operating current - one bank operation ; one bank open, bl=4, reads ... |
| Description |
16Mx64 200pin DDR SDRAM SODIMM based on 16Mx16 Data Sheet
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| File Size |
120.94K /
14 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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