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| Part No. |
KM736V747T-10
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| OCR Text |
... 1. initial document. 1. changed t cd from 8.0ns to 8.5ns at -8 2. changed t cyc from 13ns to 12ns at -10 3. changed dc condition at icc and parameters i sb1 ; from 10ma to 30ma, i sb2 ; from 10ma to 30ma add v ddq ... |
| Description |
128K X 36 ZBT SRAM, 10 ns, PQFP100
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| File Size |
386.96K /
17 Page |
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it Online |
Download Datasheet
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HYNIX SEMICONDUCTOR INC
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| Part No. |
HY5PS12821F-Y6
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| OCR Text |
...ency table 0.3 july.2002 all changed master page 0.4 aug.2002 all corrected typos and change some descriptions 0.5 aug.2002 all corrected typos and wron g definiotions and changed some items 0.51 oct.2002 page7,52 page7:modif... |
| Description |
64M X 8 DDR DRAM, PBGA60
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| File Size |
885.74K /
67 Page |
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it Online |
Download Datasheet |
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MAXWELL[Maxwell Technologies]
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| Part No. |
48SD1616RPFK 48SD1616 48SD1616RPFE 48SD1616RPFH 48SD1616RPFI
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| OCR Text |
...operation. 3. Input signals are changed once per one clock. 4. After power down mode, CLK operating current. 5. After power down mode, no CLK operating current. 6. Input signals are changed once per two clocks. 7. Input signals are VIH or V... |
| Description |
256 Mb SDRAM 4-Meg X 16-Bit X 4-Banks
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| File Size |
592.47K /
42 Page |
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it Online |
Download Datasheet |
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MAXWELL[Maxwell Technologies]
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| Part No. |
48SD6404RPFK 48SD6404 48SD6404RPFE 48SD6404RPFH 48SD6404RPFI
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| OCR Text |
...operation. 3. Input signals are changed once per one clock. 4. After power down mode, CLK operating current. 5. After power down mode, no CLK operating current. 6. Input signals are changed once per two clocks. 7. Input signals are VIH or V... |
| Description |
256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks
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| File Size |
591.66K /
42 Page |
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it Online |
Download Datasheet |
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Price and Availability
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