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Electronic Theatre Controls, Inc. ETC[ETC]
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Part No. |
PS-50A MBPC-200-5825 PCM-5825 PCM-5825-G0A2
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OCR Text |
...ze Resolution NS CX 5530 1-4 MB uma shared memory Up to 1024 x 768 @ 24 bpp non-interlaced CRT and 1024x 768 @ 18 bpp TFT LCD display. (supports 3.3V LCD) 18-bit TTL for TFT LCD only
LCD Interface
I/O
MIO IrDA Audio USB 1 x EIDE (Ult... |
Description |
NS Geode SBC with CPU/ 4 COMs/ Audio/ VGA/LCD and Ethernet NS Geode SBC with CPU, 4 COMs, Audio, VGA/LCD and Ethernet 纳秒Geode西南贝尔与CPU以太网络,音频,VGA端口/ LCD和以太网 NS Geode SBC with CPU, 4 COMs, Audio, VGA/LCD and Ethernet 纳秒Geode西南贝尔与CPU4以太网络,音频,VGA端口/ LCD和以太网
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File Size |
179.46K /
2 Page |
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it Online |
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Broadcom
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Part No. |
BCM7320
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OCR Text |
...a unified memory architecture, (uma), utilizing double data rate (DDR) memory, either 16-bit or 32-bit wide, depending on required performance. The BCM7320 is the first complete single chip that can decode two transport streams, delivered e... |
Description |
Single-Chip Satellite Set-Top Dual TV Decoder
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File Size |
88.93K /
2 Page |
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it Online |
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INTEL[Intel Corporation]
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Part No. |
EM104P-I6023
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OCR Text |
...S3 Savage4 Engine up to 32MByte uma Video RAM CRT support QXGA up to 1920 x 1440 LCD support 18/36 bit LVDS up to 1280 x 1024 LCD support 18/24/36 bit TTL up to 1280 x 1024 TV-out support NTSC / PAL up to 1024 x 768
Mechanical & Environm... |
Description |
Intel Ultra Low Voltage Celeron 400 PC/104 Board with VGA/LCD, TV-out, CF, PC/104 & PC/104-Plus
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File Size |
84.37K /
1 Page |
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it Online |
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LSI[LSI Computer Systems]
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Part No. |
DMN-8603
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OCR Text |
...ue Unified Memory Architecture (uma), the entire system requires only a single DRAM and Flash device. Integrated Real Time Clock and low power standby mode eliminate the need for a front panel microcontroller. In addition to enabling cost-e... |
Description |
DiMeNsion -3 DVD Recorder Solution Servo, Video Decoder and System Processor
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File Size |
167.82K /
4 Page |
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it Online |
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BOARDCOM[Broadcom Corporation.]
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Part No. |
BCM7328
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OCR Text |
...a unified memory architecture, (uma), utilizing a 150-MHz Double Data Rate (DDR) memory interface that supports either 16-bit or 32-bit wide, depending on required system performance. The BCM7328 single chip can decode two transport streams... |
Description |
Single-Chip Satellite Set-Top Dual TV Decoder with Integrated 8PSK SINGLE-CHIP SATELLITE SET-TOP BOX DECODER
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File Size |
87.96K /
2 Page |
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it Online |
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Broadcom
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Part No. |
BCM7312
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OCR Text |
... a unified memory architecture (uma), utilizing a 150 MHz, 16-bit wide Double Data Rate (DDR) memory interface for added performance. The BCM7312 offers very high levels of integration for reduced system BOM, including RF 3/4 Modulator, USB... |
Description |
Single-Chip Satellite Set-Top Decoder
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File Size |
95.70K /
2 Page |
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it Online |
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IBM Microelectronics
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Part No. |
IBM39STB021X
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OCR Text |
...ts Unified Memory Architecture (uma), which connects multiple PLB master buses to the PLB slave buses, thus allowing two sets of PLB buses to intercommunicate. Processor, transport, and the audio and video decoders can access memory through... |
Description |
Digital Set-Top Box Integrated Controllers
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File Size |
265.25K /
39 Page |
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it Online |
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Price and Availability
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