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百利通电子（上海）有限公
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| Part No. |
PI6CUA878NFE PI6CUA878NFEX
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| OCR Text |
...ice is a zero delay buffer that distributes a differential clock input pair (clk, clk) to eleven differential pairs of clock outputs which includes feedback clock (y[0:9], y[0:9]; fbout, fbout). the clock outputs are controlled by clk/... |
| Description |
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| File Size |
429.97K /
11 Page |
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it Online |
Download Datasheet
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Cypress
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| Part No. |
CY28353OC-2
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| OCR Text |
...synchronous DRAM applications * distributes one differential clock input to six differential outputs * External feedback pins (FBINT, FBINC) are used to synchronize the outputs to the clock input * Conforms to the DDRI specification * Sprea... |
| Description |
Differential Clock Buffer/Driver
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| File Size |
207.44K /
10 Page |
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it Online |
Download Datasheet |
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Price and Availability
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