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Xilinx, Inc.
XILINX INC
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| Part No. |
XC3S200-4VQ100I XC3S1000-4FTG256I XC3S200-4PQ208C XC3S200-4PQ208I XC3S200-4VQG100I XC3S200-5VQG100C XC3S200-4PQG208I XC3S50-4CPG132I XC3S5000-4FG900C XC3S1500-4FGG320I XILINXINC-XC3S2000-4FG456I
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| OCR Text |
...m differential i/o pairs rows columns total clbs xc3s50 (2) 50k 1,728 16 12 192 12k 72k 4 2 124 56 xc3s200 (2) 200k 4,320 24 20 480 30k 216k 12 4 173 76 xc3s400 (2) 400k 8,064 32 28 896 56k 288k 16 4 264 116 xc3s1000 (2) 1m 17,280 48 40... |
| Description |
200000 SYSTEM GATE 1.2 VOLT FPGA FPGA, 480 CLBS, 200000 GATES, 630 MHz, PQFP100
1000000 SYSTEM GATE 1.2 VOLT FPGA FPGA, 1920 CLBS, 1000000 GATES, 630 MHz, PBGA256
200000 SYSTEM GATE 1.2 VOLT FPGA FPGA, 480 CLBS, 200000 GATES, 630 MHz, PQFP208
200000 SYSTEM GATE 1.2 VOLT FPGA FPGA, 480 CLBS, 200000 GATES, 725 MHz, PQFP100
XC3S50-4CPG132I FPGA, 192 CLBS, 50000 GATES, 630 MHz, PBGA132
5000000 SYSTEM GATE 1.2 VOLT FPGA FPGA, 8320 CLBS, 5000000 GATES, 630 MHz, PBGA900
1500000 SYSTEM GATE 1.2 VOLT FPGA FPGA, 3328 CLBS, 1500000 GATES, 630 MHz, PBGA320
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| File Size |
2,193.63K /
217 Page |
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it Online |
Download Datasheet
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TOSHIBA
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| Part No. |
T6963C
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| OCR Text |
...play format (pin ? selectable) columns : 32, 40, 64, 80 lines : 2, 4, 6, 8, 1 0, 1 2, 1 4, 1 6, 20, 24, 28, 32 the combination of number of columns and number of lines must not cause the frequency to exceed 5.5 mhz. (see fig. 2) ... |
| Description |
DOT MATRIX LCD CONTROLLER LSI
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| File Size |
694.98K /
48 Page |
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it Online |
Download Datasheet |
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Xilinx, Inc.
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| Part No. |
XC2S50E-6PQG208C XC2S300E-6PQG208I
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| OCR Text |
... at each corner of the die. two columns of block ram lie on opposite sides of the die, between the clbs and the iob columns. the xc2s400e has four col- umns and the xc2s600e has six columns of block ram. these functional elements are interc... |
| Description |
50,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN FPGA, 384 CLBS, 23000 GATES, 357 MHz, PQFP208
300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN FPGA, 1536 CLBS, 93000 GATES, 357 MHz, PQFP208
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| File Size |
810.82K /
103 Page |
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it Online |
Download Datasheet |
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VLSI Vision Limited
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| Part No. |
VV5850
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| OCR Text |
...n a sample-and- hold stage. the columns are then read out alternately, and multiplexed through four output channels to the avo output stage. the image can then be unshuffled and recon- structed in external buffering and processing circu... |
| Description |
Monolithic Sensors
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| File Size |
600.75K /
41 Page |
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it Online |
Download Datasheet |
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Applied Micro Circuits, Corp.
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| Part No. |
CS19208CBI
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| OCR Text |
... port. coverage of these stuff columns in the bip calculation or in the fec is optional and can be enabled via software. when the no- coverage option is enabled, the bip and parity check values are calculated as if the standard stuff val... |
| Description |
OC-192/48/12/3 DW/FEC/PM and ASYNC Mapper Device OC-192/48/12/3仓库/前向纠错/ PM和异步映射器装置
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| File Size |
124.56K /
4 Page |
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it Online |
Download Datasheet |
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Price and Availability
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