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Intel Corp.
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| Part No. |
376
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| OCR Text |
...gement Unit (MMU) consists of a segmentation and protection unit segmentation allows the managing of the logical address space by providing an extra addressing component one that allows easy code and data relocatability and efficient sharin... |
| Description |
DIODE SCHOTTKY DUAL-DUAL SERIES 30V 200mW 0.38V-vf 200mA-IFM 1mA-IF 0.2uA-IR SOT-363 3K/REEL
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| File Size |
1,319.42K /
95 Page |
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it Online |
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Madge Networks
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| Part No. |
58-27
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| OCR Text |
... workgroup concentration, micro-segmentation or branch office use. Each Smart Ringswitch Express unit is pre-configured with 16 Token Ring ports (16/4 or 100Mbps; copper or fiber). An option module slot can be used to increase port capacity... |
| Description |
Token Ring Switch, 4Mbps|16Mbps, Copper, 90V|130V|180V|250V (AC), Module
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| File Size |
121.70K /
2 Page |
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it Online |
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IDT
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| Part No. |
75P52100 IDT75P52100
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| OCR Text |
...at initialization to define the segmentation of the entries, timing of outputs and the SRAM interface. s Global Mask Registers are provided to support Lookup instructions by masking individual bits during a search. s Comparand Registers ass... |
| Description |
64K x72 Network Search Engine
Network Search Engines (NSE) with High Performance Interface
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| File Size |
55.53K /
3 Page |
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it Online |
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Freescale Semiconductor, Inc.
FREESCALE SEMICONDUCTOR INC
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| Part No. |
MPC8543VUANG MPC8543VUANGA MPC8543VUANGB MPC8548VTAQHB MPC8548EHXAQGB MPC8547CHXAQJB MPC8547EVTAQJB
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...t transla tion for rapidio with segmentation and sub-segmentation support ? ddr/ddr2 memory controller ? programmable timing supporting ddr and ddr2 sdram ? 64-bit data interface ? four banks of memory supported, each up to 4 gbytes, to a ... |
| Description |
32-BIT, 800 MHz, MICROPROCESSOR, CBGA783 29 X 29 MM, 1 MM PITCH, FLIP CHIP, LEAD FREE, CERAMIC, BGA-783
32-BIT, 1000 MHz, MICROPROCESSOR, PBGA783
32-BIT, 1000 MHz, MICROPROCESSOR, CBGA783
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| File Size |
1,345.97K /
142 Page |
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Marvell
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| Part No. |
88E8040
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| OCR Text |
...et processing tasks such as TCP segmentation, TCP/UDP/IP checksum calculation and checking are all performed on-chip. These offloads along with interrupt moderation schemes reduce CPU utilization and improve the overall system performance. ... |
| Description |
PCI Express Fast Ethernet Controller
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| File Size |
122.01K /
8 Page |
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it Online |
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