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Integrated Device Techn...
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| Part No. |
932SQL450
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| OCR Text |
... flexibility ? 64-pin tssop and vfqfpn packages; smallest board footprint output features ? 4 - low-power hcsl-compatible (lp-hcsl) cpu out...24 41 ns_src0_z85c dot96_z85c 25 40 nc avdd96 26 39 gndsrc test_mode 27 38 avdd_src ckpwrgd#/pd 28 3... |
| Description |
Integrated 85 ohm differential terminations
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| File Size |
346.29K /
23 Page |
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it Online |
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Integrated Device Techn...
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| Part No. |
5P49V5927BDDDNLGI8
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| OCR Text |
...d , v dda ? available in 24-pin vfqfpn 4mm x 4mm package ? -40 to +85c industrial temperature operation 1 7 24-pin vfqfpn 19 13 xout xin/ref v ddo 3 clkin out6 out3 clkinb clksel out5 out4 v ddo 2 v dda sd/oe sel1/sda sel0/scl v dda nc nc o... |
| Description |
Programmable Clock Generator
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| File Size |
345.17K /
27 Page |
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it Online |
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Integrated Circuit Syst...
Integrated Device Techn...
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| Part No. |
9DBU0231
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| OCR Text |
...ers ? space saving 24-pin 4x4mm vfqfpn; minimal board space block diagram control logic ^vhibw_bypm_lobw# ^ckpwrgd_pd# sdata_3.3 ss- compatible pll voe(1:0)# sclk_3.3 clk_in c l k _ i n # 2 dif0 dif1
2 o/p 1.5v pcie gen1-2-3 zdb/fob 2 ... |
| Description |
slew rate for each output
HCSL compatible differential input
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| File Size |
291.09K /
17 Page |
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it Online |
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Integrated Device Techn...
Integrated Circuit Syst...
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| Part No. |
9DBU0241
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| OCR Text |
...ers ? space saving 24-pin 4x4mm vfqfpn; minimal board space block diagram control logic ^vhibw_bypm_lobw# ^ckpwrgd_pd# sdata_3.3 ss- compatible pll voe(1:0)# sclk_3.3 clk_in c l k _ i n # 2 dif0 dif1
2 o/p 1.5v pcie gen1-2-3 zdb/fob w/... |
| Description |
HCSL-compatible differential input
slew rate for each output
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| File Size |
292.60K /
17 Page |
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it Online |
Download Datasheet |
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Integrated Device Techn...
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| Part No. |
9DBL0252BKILFT 9DBL0242BKILF 9DBL0242BKILFT
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| OCR Text |
...ent ? space saving 24-pin 4x4mm vfqfpn; minimal board space block diagram note: resistors default to internal on xx42/xx52 devices. p2 dev ices have programmable default impedances on an output-by-output bas is.
2-output 3.3v pcie zero... |
| Description |
2-output 3.3V PCIe Zero-Delay Buffer
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| File Size |
297.28K /
19 Page |
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it Online |
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Integrated Device Techn...
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| Part No. |
9DBL0242 9DBL0252
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| OCR Text |
...ent ? space saving 24-pin 4x4mm vfqfpn; minimal board space block diagram note: resistors default to internal on xx42/xx52 devices. p2 dev ices have programmable default impedances on an output-by-output bas is.
2-output 3.3v pcie zero... |
| Description |
2-output 3.3V PCIe Zero-Delay Buffer
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| File Size |
297.55K /
19 Page |
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it Online |
Download Datasheet |
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Price and Availability
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