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pecl lvds cml Datasheet PDF File

For pecl lvds cml Found Datasheets File :: 282 Search Time::1.703ms
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				ON Semiconductor
Part No.	MC100EP91 MC100EP91DW MC100EP91DWG MC100EP91DWR2 MC100EP91DWR2G MC100EP91MN MC100EP91MNG MC100EP91MNR2 MC100EP91MNR2G
OCR Text	...perating Voltage Output Current pecl VBB Sink/Source Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-A...lvds signal levels. The limitations for differential input signal (lvds, HSTL, LVpecl, or cml) are t...
Description	2.5 V/3.3 V Any Level Positive Input to -3.3 V/-5.5 V NECL Output Translator
File Size	160.31K / 10 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	NB6L11DG NB6L11_06 NB6L11 NB6L11D NB6L11DR2 NB6L11DR2G NB6L11DT NB6L11DTG NB6L11DTR2 NB6L11DTR2G NB6L1106
OCR Text	...w 75 ps Typical Rise/Fall Times pecl Mode Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V NECL Mode Op rating Range: VCC = 0 V with...lvds, LVpecl, LVNECL, LCMOS, LVTTL and cml Input Compatible Pb-Free Packages are Available 8 1 TS...
Description	2.5 V/3.3 V Multilevel Input to Differential LVpecl/LVNECL 1:2 Clock or Data Fanout Buffer/Translator
File Size	209.50K / 12 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	NBSG111BAR2 NBSG111BA NBSG111
OCR Text	...and accept NECL (Negative ECL), pecl (Positive ECL), LVTTL, LVCMOS, cml, or lvds. Outputs are RSECL (Reduced Swing ECL), 400 mV. The Q[0:9] / Q[0:9] outputs have a differential synchronous enable (EN/EN) pin. The synchronous enable pin is u...
Description	2.5V/3.3V SiGe Differential 1:10 Clock/Data Driver with RSECL Outputs
File Size	166.88K / 11 Page	View it Online	Download Datasheet

				MICREL[Micrel Semiconductor]
Part No.	SY58611UMGTR SY58611UMG SY58611U
OCR Text	...DC- and AC-coupled inputs (cml, pecl, lvds) * Unique, patented MUX input isolation design minimizes adjacent channel crosstalk * Ultra-low jitter design - <1psRMS cycle-to-cycle jitter - <10psPP total jitter - <1psRMS random jitter - <10psP...
Description	3.2Gbps Precision, lvds 2:1 MUX with Internal Termination and Fail Safe Input
File Size	603.63K / 13 Page	View it Online	Download Datasheet

				MICREL[Micrel Semiconductor]
Part No.	SY89325V SY89325VMITR SY89325VMGTR
OCR Text	pecl/LVpecl-to-lvds TRANSLATOR Precision Edge(R) SY89325V Precision Edge(R) SY89325V FEATURES Guaranteed AC performance over temp and voltage: * DC-to >1.5Gbps data rate throughput * >750MHz clock fMAX * <50ps within-device skew ...
Description	3.3V/5V 1.5Gbps DIFFERENTIAL cml/pecl/LVpecl-to-lvds TRANSLATOR
File Size	504.11K / 7 Page	View it Online	Download Datasheet

				Micrel Semiconductor
Part No.	SY89875U SY89875UMI SY89875UMITR
OCR Text	...led and AC-coupled Inputs; cml, pecl, lvds and HSTL I lvds compatible outputs I TTL/CMOS inputs for select and reset I Parallel programming capability I Programmable divider ratios of 1, 2, 4, 8 and 16 I Low voltage operation 2.5V I Output ...
Description	2.5V, 2.0GHz ANY DIFF. IN-TO-lvds PROGRAMMABLE CLOCK DIVIDER AND 1;2 FANOUT BUFFER W/ INTERNAL TERMINATION
File Size	229.38K / 10 Page	View it Online	Download Datasheet

				MICREL[Micrel Semiconductor]
Part No.	SY89221UHYTR SY89202U SY89218U SY89200U SY89221U SY89221UHY
OCR Text	...DC- and AC-coupled inputs (cml, pecl, lvds) * CMOS/TTL-compatible output enable (EN) and divider select control * 2.5V 5% or 3.3V 10% power supply * -40C to +85C temperature range * Available in 64-pin TQFP Applications * All SONET/SDH ...
Description	Precision 1:15 LVpecl Fanout Buffer with 2:1 MUX and Four ÷1/÷2/÷4 Clock Divider Output Banks Precision 1:15 LVpecl Fanout Buffer with 2:1 MUX and Four ±1/±2/±4 Clock Divider Output Banks Precision 1:15 LVpecl Fanout Buffer with 2:1 MUX and Four 卤1/卤2/卤4 Clock Divider Output Banks
File Size	317.26K / 17 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	MC100EPT2306 MC100EPT23MNR4G MC100EPT23 MC100EPT23D MC100EPT23DG MC100EPT23DR2 MC100EPT23DR2G MC100EPT23DT MC100EPT23DTG MC100EPT23DTR2 MC100EPT23DTR2G MC100EPT23MNR4
OCR Text	....com 2 MC100EPT23 Table 4. pecl DC CHARACTERISTICS VCC = 3.3 V, GND = 0 V (Note 2) -40C Symbol ICCH ICCL VIH VIL VIHCMR IIH IIL Charac...lvds and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Term...
Description	3.3V Dual Differential LVpecl/lvds/cml to LVTTL/LVCMOS Translator
File Size	82.29K / 8 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	NB100LVEP91DW NB100LVEP91 NB100LVEP91MNR2 NB100LVEP91DWR2 NB100LVEP91MN NB100LVEP91-D
OCR Text	...ON Any Level Inputs ECL Outputs pecl Reference Voltage Output Positive Supply (2.5 V, 3.3 V) Negative Supply (-2.5 V, -3.3 V, -5 V) Ground N...lvds signal levels. The limitations for differential input signal (lvds, HSTL, LVpecl, or cml) are t...
Description	2.5V / 3.3V AnyLevel Positive Input to -2.5V / -3.3V / -5V NECL Output Translator 2.5V / 3.3V Any Level Positive Input to -2.5V -3.3V / -5V NECL Output Translator From old datasheet system
File Size	76.20K / 8 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	NB4L52MNR2G NB4L52MNG NB4L52_07 NB4L52 NB4L5207
OCR Text	...ation resistors and will accept pecl, LVpecl, LVCMOS, LVTTL, cml, or lvds logic levels. When Clock transitions from Low to High, Data will be transferred to the differential LVpecl outputs. The differential Clock inputs allow the NB4L52 to ...
Description	2.5 V/3.3 V/5.0 V Differential Data/Clock D Flip-Flop with Reset Multi-Level Inputs to LVpecl Translator w/ Internal Termination
File Size	127.11K / 8 Page	View it Online	Download Datasheet

For pecl lvds cml Found Datasheets File :: 282 Search Time::1.703ms
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