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ON Semiconductor
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Part No. |
NB4N527S
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OCR Text |
... cml, lvds, lvcmos, lvttl, hstl noninverted differential clock/data d1 input (note 1). 3 d1 lvpecl, cml, lvds, lvcmos, lvttl, hstl inverted differential clock/data d1 input (note 1). 4 vtd1 ? internal 50 termination pin for d1 . (r tin... |
Description |
3.3V, 2.5Gb/s Dual AnyLevel to LVDS Receiver/Driver/Buffer/Translator with Internal Input Termination(带内部输入终端的3.3V, 2.5Gb/sAnyLevel到LVDS接收驱动缓冲译码
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File Size |
112.11K /
10 Page |
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