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    MS5534-CM MS5534-CP MS5534C

Intersema Sensoric SA
Part No. MS5534-CM MS5534-CP MS5534C
OCR Text ...c 0005534C1175 ECN1118 June 16th, 2008 1 PIN CONFIGURATION Fig. 2: Pin configuration of MS5534CM. Pin Name GND SCLK DOUT DIN MCLK VDD PEN (1) PV (1) Pin 1 2 3 4 5 6 7 8 Type G I O I I P I N Function Ground Serial data clock Da...
Description BAROMETER MODULE

File Size 766.83K  /  21 Page

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    Asahi Kasei Microsystems Co.,Ltd
Asahi Kasei Microsystems Co., Ltd.
Part No. AK2307 AK2307LV
OCR Text ...] Goes up anytime after SCLK 16th pulse and before 32nd pulse 1 2 3 4 8 9 15 16 1 1 1 0 0 0 0 * D7 D0 Z 1 1 1 D7 D1 D0 Z Instruction Code Address "0000" ...
Description SPEECH CODEC for Digital Key telephone (5.0V/3.3V) 语音编解码器的数字按键电话(5.0V/3.3V

File Size 465.94K  /  39 Page

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    HSDL7001 HSDL-7001 HSDL-7001-2500

Agilent (Hewlett-Packard)
HP[Agilent(Hewlett-Packard)]
Part No. HSDL7001 HSDL-7001 HSDL-7001-2500
OCR Text ...lectronics. Input signal is a 3/16th or 1.6 s pulse which is demodulated to generate RCV output signal. This is the modulated TXD signal. A high level on this input puts the chip into the monoshot transmit mode. In this mode, when there is ...
Description IR 3/16 Encode/Decode IC

File Size 124.74K  /  8 Page

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    MDT10P73K11 MDT10P73BA MDT10P73S11 MDT10P73SS11

Micon Design Technology Corporation
Part No. MDT10P73K11 MDT10P73BA MDT10P73S11 MDT10P73SS11
OCR Text ...e 0 1 1 1: Capture1 mode, every 16th rising edge 1 0 0 0: Compare1 mode, set output on match 1 0 0 1: Compare1 mode, clear output on match 1 0 1 0: Compare1 mode, generate software interrupt on match 1 0 1 1: Compare1 mode, trigger special ...
Description 8-bit micro-controller

File Size 146.42K  /  22 Page

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    HEF4517 HEF4517B HEF4517BD HEF4517BF HEF4517BN HEF4517BP HEF4517BT

NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
Part No. HEF4517 HEF4517B HEF4517BD HEF4517BF HEF4517BN HEF4517BP HEF4517BT
OCR Text ...and four 3-state outputs of the 16th, 32nd, 48th and 64th bit positions (O16 to O64). Data at the D input is entered into the first bit on the LOW to HIGH transition of the clock, regardless of the state of PE/EO. HEF4517B LSI When PE/E...
Description Dual 64-bit static shift register(64位静态移位寄存器) 64位静态移位寄存器(双64位静态移位寄存器

File Size 75.67K  /  8 Page

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    LTC1403 LTC1403A LTC1403ACMSE LTC1403AIMSE LTC1403CMSE LTC1403IMSE

Linear Technology Corporation
LINER[Linear Technology]
Part No. LTC1403 LTC1403A LTC1403ACMSE LTC1403AIMSE LTC1403CMSE LTC1403IMSE
OCR Text ...o Sample Mode CONV to Hold Mode 16th SCK to CONV Interval (Affects Acquisition Period) Minimum Delay from SCK to Valid Bits 0 Through 13 SCK to Hi-Z at SDO Previous SDO Bit Remains Valid After SCK VREF Settling Time After Sleep-to-Wake Tran...
Description MB 61C 61#20 PIN PLUG
Serial 12-Bit/14-Bit/ 2.8Msps Sampling ADCs with Shutdown
Serial 12-Bit/14-Bit, 2.8Msps Sampling ADCs with Shutdown

File Size 319.66K  /  20 Page

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