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Maxim Integrated Products, Inc.
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| Part No. |
MAX7033EVKIT-433
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| OCR Text |
...minal output. The error in this sliced digital signal increases with reduced RF signal level. The sensitivity is usually defined as the point at which the error in interpreting the data (by the following embedded circuitry) increases beyond... |
| Description |
Evaluation Kit
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| File Size |
210.85K /
7 Page |
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it Online |
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Philips Semiconductors
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| Part No. |
TDA4858 TDA4858NBSP
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| OCR Text |
...syncs are clamped to 1.28 V and sliced at 1.4 V. This results in a fixed absolute slicing level of 120 mV related to sync top. For DC-coupled TTL signals the input clamping current is limited. The slicing level for TTL signals is 1.4 V. The... |
| Description |
Economy Autosync Deflection Controller (EASDC)
Video Deflection Circuit
Economy Autosync Deflection
From old datasheet system
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| File Size |
194.14K /
44 Page |
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it Online |
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Zarlink Semiconductor Inc.
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| Part No. |
MV1820FCG MV1820FDPAS MV1820FMPES
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| OCR Text |
...description the video signal is sliced to produce data and synchronising signals. timing circuits monitor the sync signal to enable the mv1820 to lock onto the broadcast signal. a timing window, for the vertical blanking interval (vbi) line... |
| Description |
Video Programme Delivery Control Interface Circuit
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| File Size |
301.00K /
9 Page |
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it Online |
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Philips
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| Part No. |
TDA4857PS
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| OCR Text |
...) applied to VSYNC (pin 14) are sliced at 1.4 V. The output signal of the sync slicer is integrated on an internal capacitor to detect and normalize the sync polarity. The output signals of vertical sync integrator and sync normalizer are d... |
| Description |
I 2 C-bus autosync deflection
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| File Size |
243.01K /
56 Page |
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it Online |
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