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CYPRESS SEMICONDUCTOR CORP
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Part No. |
CY37032P44-125AXC
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OCR Text |
cplds cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document number : 38-03007 rev. *h revised november 09, 2010 features in-system reprogrammable? (isr?) cmos cplds ? jtag interface fo... |
Description |
5V, 3.3V, ISRTM High-Performance cplds
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File Size |
1,156.10K /
43 Page |
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XILINX INC
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Part No. |
XCR3064A-10CP56C
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OCR Text |
...nd in a family of coolrunner ? cplds from xilinx. these devices combine high speed and zero power in a 64 macrocell cpld. with the fzp design tech- nique, the xcr3064a offers true pin-to-pin speeds of 7.5 ns, while simultaneously deliverin... |
Description |
EE PLD, 10 ns, PBGA56
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File Size |
158.77K /
17 Page |
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CYPRESS SEMICONDUCTOR CORP
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Part No. |
CY39100Z208B-83NI CY39100Z208B-200NC CY39100V256A-125BBC CY39100V388-83MGC 100Z484B-125BBC
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OCR Text |
cplds at fpga densities? delta39k? isr? cpld family preliminary cypress semiconductor corporation 3901 north first street san jose ca 95134 408-943-2600 document #: 38-03039 rev. *a revised july 5, 2001 features high density ... |
Description |
LOADABLE PLD, 15 ns, PQFP208 LOADABLE PLD, 7.5 ns, PQFP208 LOADABLE PLD, 10 ns, PBGA256 LOADABLE PLD, 15 ns, PBGA388 LOADABLE PLD, 10 ns, PBGA484
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File Size |
1,174.66K /
56 Page |
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XILINX
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Part No. |
XC2C256
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OCR Text |
...JEDEC compliance. CoolRunner-II cplds are also 1.5V I/O compatible with the use of Schmitt-trigger inputs Table 1: I/O Standards for XC2C256 Output VCCIO 3.3 3.3 2.5 1.8 1.5 1.5 2.5 3.3 Input VCCIO 3.3 3.3 2.5 1.8 1.5 1.5 2.5 3.3 Board Inpu... |
Description |
The CoolRunner™-II 256-macrocell device
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File Size |
151.36K /
25 Page |
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XILINX INC
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Part No. |
XC2C64-5PCG44C XC2C64-5VQG100C
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OCR Text |
...technology xilinx coolrunner-ii cplds are fabricated on a 0.18 micron process technology which is derived from leading edge fpga product development. coolrunner-ii cplds employ realdigital, a design technique that makes use of cmos technolo... |
Description |
FLASH PLD, 5 ns, PQCC44 FLASH PLD, 5 ns, PQFP100
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File Size |
275.89K /
16 Page |
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Cypress
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Part No. |
CY3130 3130
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OCR Text |
cplds
Features
* Sophisticated CPLD design and verification system based on VHDL and Verilog * Warp3(R) is based on the Workview Office(R) (PC) design environment -- Advanced graphical user interface for Windows(R) -- Schematic capture (V... |
Description |
Warp3 VHDL and Verilog Development System for cplds From old datasheet system
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File Size |
136.94K /
6 Page |
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