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| Part No. |
XRT94L33 XRT94L33IB XRT94L333
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| OCR Text |
...nal pointer leak algorithm for clock smoothing as well as to remove the jitter due to mapping and pointer movements. these de-synchronizer circuits do not need any external clock reference for its operation. the sonet/sdh transmit bloc... |
| Description |
-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - SONET REGISTERS
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| File Size |
3,662.00K /
801 Page |
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| Part No. |
XRT94L33 XRT94L332 XRT94L33IB
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| OCR Text |
...nal pointer leak algorithm for clock smoothing as well as to remove the jitter due to mapping and pointer movements. these de-synchronizer circuits do not need any external clock reference for its operation. the sonet/sdh transmit bloc... |
| Description |
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - SDH REGISTERS
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| File Size |
3,684.65K /
810 Page |
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| Part No. |
XRT94L33IB XRT94L3306
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| OCR Text |
...nal pointer leak algorithm for clock smoothing as well as to remove the jitter due to mapping and pointer movements. these de-synchronizer circuits do not need any external clock reference for its operation. the sonet/sdh transmit bloc... |
| Description |
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
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| File Size |
2,228.85K /
465 Page |
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http://
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| Part No. |
XRT94L3307 XRT94L33IB
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| OCR Text |
...nal pointer leak algorithm for clock smoothing as well as to remove the jitter due to mapping and pointer movements. these de-synchronizer circuits do not need any external clock reference for its operation. the sonet/sdh transmit bloc... |
| Description |
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - ATM REGISTERS
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| File Size |
3,989.81K /
862 Page |
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it Online |
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http://
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| Part No. |
XRT94L3107 XRT94L31IB
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| OCR Text |
...nal pointer leak algorithm for clock smoothing as well as to remove the jitter due to mapping and pointer movements. these de-synchronizer circuits do not need any external clock reference for its operation. the sonet/sdh transmit block... |
| Description |
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
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| File Size |
1,060.48K /
133 Page |
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ZARLINK[Zarlink Semiconductor Inc]
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| Part No. |
ZL30409_DDB ZL30409 ZL30409_DDA
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| OCR Text |
...C6, C8, C16, and C19 (STS-3/OC3 clock divided by 8) output clock signals Provides 5 styles of 8 KHz framing pulses Holdover frequency accura...synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization ... |
| Description |
Dual reference frequency selectable, 3.3V Digital PLL with multiple clock outputs for T1/E1 and Stratum 4 and 4E applications, with Stratum 3 Holdover
T1/E1 System synchronizer with Stratum 3 Holdover
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| File Size |
284.56K /
32 Page |
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Price and Availability
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