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Integrated Device Techn...
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| Part No. |
853S111AI 853S111AYILF 853S111AYILFT
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| OCR Text |
... levels. 3 pclk0 input pulldown non-inverting differential lvpecl clock input. 4 npclk0 input pullup/ pulldown inverting differential lvpec...terminated with 50 ? to v cco ? 2v. note 2: single-ended input operation is limited. v cc ? 3v ... |
| Description |
Differential-to-LVPECL/ECL Fanout Buffer
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| File Size |
282.19K /
20 Page |
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ONSEMI[ON Semiconductor]
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| Part No. |
NB6L14MNG NB6L14_07 NB6L14 NB6L14MNR2G
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| OCR Text |
...Output LVTTL/LVCMOS Description Non-inverted Differential Output. Typically Terminated with 50 W Resistor to VCC-2.0 V. Inverted Differential Output. Typically Terminated with 50 W Resistor to VCC - 2.0 V. Non-inverted Differential Output. ... |
| Description |
2.5 V/3.3 V 3.0 GHz Differential 1:4 LVPECL Fanout Buffer
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| File Size |
110.34K /
10 Page |
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it Online |
Download Datasheet |
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MACOM[Tyco Electronics]
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| Part No. |
MASWSS0201SMB MASWSS0201TR-3000 MASWSS0201
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| OCR Text |
...low Compatible Configurable for non-terminated Operation
MASWSS0201 V1
Functional Schematic
Description
M/A-COM's MASWSS0201 is a broadband GaAs PHEMT MMIC SPDT terminated switch in a low cost, lead-free 3 mm 12-lead PQFN package.... |
| Description |
GaAs Broadband 75 Ohm Default-On, SPDT Terminated Switch DC - 2.5 GHz
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| File Size |
165.94K /
6 Page |
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it Online |
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ICST[Integrated Circuit Systems]
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| Part No. |
ICS8308I ICS8308AGI ICS8308AGILF ICS8308AGILFT ICS8308AGIT
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| OCR Text |
...VCMOS / LVTTL interface levels. Non-inver ting differential clock input. Clock enable. LVCMOS / LVTTL interface levels. Output enable. LVCMO...terminated with 50 to VDDO/2. See Parameter Measurement section, "3.3V Output Load AC Test Circuit".... |
| Description |
Low Skew, 1-To-8 Differential/LVCOMS-TO-LVCMOS Fanout Buffer 低斜差分/ LVCOMS到的LVCMOS扇出缓冲
Low Skew 1-To-8 Differential/LVCOMS-TO-LVCMOS Fanout Buffer
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| File Size |
186.20K /
15 Page |
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it Online |
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ICST[Integrated Circuit Systems]
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| Part No. |
ICS8344BYT ICS8344 ICS8344BY
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| OCR Text |
...l clock input pair.
Pulldown Non-inver ting input of secondar y differential clock input pair. Pulldown Non-inver ting input of primar y ...terminated with 50 to VDDO/2. NOTE 2: Defined as skew within a bank of outputs at the same voltages ... |
| Description |
LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
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| File Size |
97.16K /
15 Page |
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it Online |
Download Datasheet |
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Price and Availability
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