|
|
|
Cypress
|
Part No. |
CY7C2268KV18-550BZC CY7C2270KV18-400BZXC CY7C2270KV18-550BZXC
|
OCR Text |
...ogic address register read add. decode read data reg. r/w output logic reg. reg. reg. 18 36 18 bws [1:0] v ref write add. decode 18 20 18 ld control r/w doff 1m x 18 array 1m x 18 array 18 dq [17:0] 18 cq cq qvld logic block diagram ? cy7c2... |
Description |
36-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT
|
File Size |
631.40K /
30 Page |
View
it Online |
Download Datasheet |
|
|
|
Cypress
|
Part No. |
CY7C2168KV18-550BZC CY7C2170KV18-400BZXC CY7C2170KV18-550BZXC
|
OCR Text |
...ogic address register read add. decode read data reg. r/w output logic reg. reg. reg. 18 36 18 bws [1:0] v ref write add. decode 18 19 18 ld control r/w doff 512 k x 18 array 512 k x 18 array 18 dq [17:0] 18 cq cq qvld logic block diagram ?... |
Description |
18-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT
|
File Size |
634.53K /
30 Page |
View
it Online |
Download Datasheet |
|
|
|
Cypress
|
Part No. |
CY7C1668KV18-450BZXC CY7C1668KV18-550BZXC
|
OCR Text |
...ogic address register read add. decode read data reg. r/w output logic reg. reg. reg. 18 36 18 bws [1:0] v ref write add. decode 18 22 18 ld control r/w doff 4m x 18 array 4m x 18 array 18 dq [17:0] 18 cq cq qvld logic block diagram ? cy7c1... |
Description |
144-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)
|
File Size |
610.95K /
30 Page |
View
it Online |
Download Datasheet |
|
|
|
Cypress
|
Part No. |
CY7C1268KV18-400BZXC CY7C1268KV18-550BZXC
|
OCR Text |
...ogic address register read add. decode read data reg. r/w output logic reg. reg. reg. 18 36 18 bws [1:0] v ref write add. decode 18 20 18 ld control r/w doff 1m x 18 array 1m x 18 array 18 dq [17:0] 18 cq cq qvld write reg write reg clk a (... |
Description |
36-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)
|
File Size |
628.16K /
29 Page |
View
it Online |
Download Datasheet |
|
|
|
List of Unclassifed Man...
|
Part No. |
N3292X
|
OCR Text |
...y) format image ? support to decode interleaved ycbcr 4:4:4/4:2:2/4:2:0/4:1:1 and gray - level (y only) format image ? support to decode ycbcr 4:2:2 transpose format ? support arbitrary width and height image encode and decode ... |
Description |
ARM926EJ-S 32-bit RISC CPU with 8KB I-Cache & 8KB D-Cache
|
File Size |
129.59K /
8 Page |
View
it Online |
Download Datasheet |
|
|
|
Renesas Electronics Corporation
|
Part No. |
ICM7228CIBI ICM7228CIBIZ ICM7228AIPIZ ICM7228BIPIZ ICM7228CIPIZ
|
OCR Text |
... and icm7228b incorporate a no decode mode allowing each bit of each digit's ram word to drive individual display segments resulting in independent control of all display segments. as a result, bargraph and other irregular display segm... |
Description |
8-Digit, Microprocessor-Compatible, LED Display decoder Driver
|
File Size |
794.36K /
19 Page |
View
it Online |
Download Datasheet |
|
|
|
Renesas Electronics Corporation
|
Part No. |
ICM7218CIJIR5254 ICM7218BIJI ICM7218BIJIR5254
|
OCR Text |
...mation (data coming, shutdown , decode and hexa/code b ) or 8 bits of display input data. display data is automatically sequenced into the 8-byte internal memory on successive positive going write pulses. data may be displayed either ... |
Description |
8-Digit LED Microprocessor-Compatible Multiplexed Display decoder Driver
|
File Size |
668.91K /
14 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|