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AK93C65A 80000 MAX9376 70280 B2012 3QL60AQ PIC16F6 SI9430
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  conduct Datasheet PDF File

For conduct Found Datasheets File :: 7193    Search Time::0.968ms    
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    CYPRESS[Cypress Semiconductor]
Part No. CY7C1325B-117AC CY7C1325B-100AC CY7C1325B-100AI CY7C1325B-100BGC CY7C1325B-100BGI CY7C1325B
OCR Text ...tive LOW. Qualified with BWE to conduct byte writes. Sampled on the rising edge. BWS0 controls DQ [7:0] and DP0, BWS1 controls DQ [15:8] and DP1. See Write Cycle Descriptions table for further details. Advance input used to advance the on-c...
Description 256K x 18 Synchronous 3.3V Cache RAM

File Size 336.45K  /  17 Page

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    ANALOGICTECH[Advanced Analogic Technologies]
Part No. AAT1270IFO-T1 AAT1270
OCR Text ...wo flash LEDs, each output will conduct 50% of the total flash output current. Flash ground pin. Connect FLGND to PGND, GND, and AGND at a single point as close to the AAT1270 as possible Flash output A. Connect cathode of Flash LED A to FL...
Description 1A Step-Up Current Regulator for Flash LEDs

File Size 721.64K  /  18 Page

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    Cypress Semiconductor, Corp.
Cypress Semiconductor Corp.
CYPRESS[Cypress Semiconductor]
Part No. CY7C1352G-250AXI CY7C1352G CY7C1352G-133AXC CY7C1352G-133AXI CY7C1352G-166AXC CY7C1352G-166AXI CY7C1352G-200AXC CY7C1352G-200AXI CY7C1352G-250AXC
OCR Text ...ctive LOW. Qualified with WE to conduct writes to the SRAM. Sampled on the rising edge of CLK. Write Enable Input, active LOW. Sampled on the rising edge of CLK if CEN is active LOW. This signal must be asserted LOW to initiate a write sequ...
Description 4-Mbit (256Kx18) Pipelined SRAM with NoBL Architecture 256K X 18 ZBT SRAM, 4 ns, PQFP100

File Size 220.32K  /  13 Page

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    CYPRESS[Cypress Semiconductor]
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
Part No. CY7C1353F-66AI CY7C1353F CY7C1353F-100AC CY7C1353F-100AI CY7C1353F-117AC CY7C1353F-117AI CY7C1353F-133AC CY7C1353F-133AI CY7C1353F-66AC
OCR Text ...ctive LOW. Qualified with WE to conduct writes to the Synchronous SRAM. Sampled on the rising edge of CLK. InputWrite Enable Input, active LOW. Sampled on the rising edge of CLK if CEN is Synchronous active LOW. This signal must be asserted...
Description 4-Mb (256K x 18) Flow-through SRAM with NoBL(TM) Architecture
4-Mb (256K x 18) Flow-through SRAM with NoBL Architecture 256K X 18 ZBT SRAM, 11 ns, PQFP100
4-Mb (256K x 18) Flow-through SRAM with NoBL Architecture 256K X 18 ZBT SRAM, 6.5 ns, PQFP100

File Size 321.18K  /  13 Page

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    CYPRESS[Cypress Semiconductor]
Part No. CY7C1378B-166AC CY7C1378B
OCR Text ...ctive LOW. Qualified with WE to conduct Writes to the SRAM. Sampled on the rising edge of CLK. Write Enable Input, active LOW. Sampled on the rising edge of CLK if CEN is active LOW. This signal must be asserted LOW to initiate a Write sequ...
Description 9-Mbit (256K x 32) Pipelined SRAM with NoBL(TM) Architecture
9-Mbit (256K x 32) Pipelined SRAM with NoBL Architecture

File Size 245.94K  /  14 Page

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    NEC[NEC]
Part No. LD79A02K
OCR Text ... Emitter) HV ON : No.7 and No.8 conduct 3. Ihel ALM Signal : Photocoupler Interface (No.9 : Collector, No.10 : Emitter) Ihel ALM Signal ON : No.9 and No.10 conduct. 4. Ihel Monitor (No.11, No.12) : 1 V/mA 5. HV ON : When No.13 and No.14 con...
Description 30 GHz / 20 W CW / LIGHT WEIGHT / COMPACT / EFFICIENT
30 GHz, 20 W CW, LIGHT WEIGHT, COMPACT, EFFICIENT

File Size 47.02K  /  4 Page

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    NEC Corp.
NEC[NEC]
Part No. LD79U04K
OCR Text ... Emitter) HV ON : No.7 and No.8 conduct 3. Ihel ALM Signal : Photocoupler Interface (No.9: Collector, No.10: Emitter) Ihel ALM Signal ON : No.9 and No.10 conduct 4. Ihel Monitor (No.11, No.12) : 1 V/mA 5. HV ON : When No.13 and No.14 conduc...
Description 14 GHz / 40 W CW / LIGHT WEIGHT / COMPACT / EFFICIENT
14 GHz, 40 W CW, LIGHT WEIGHT, COMPACT, EFFICIENT

File Size 67.96K  /  4 Page

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    NEC Corp.
NEC[NEC]
Part No. LD79U12K
OCR Text ...Emitter) HV ON : No.2 and No.10 conduct 2. Ihel ALM Signal : Photocoupler Interface (No.3: Collector, No.11: Emitter) Ihel ALM Signal ON : No.3 and No.11 conduct 3. Ihel Monitor (No.4, No.12) : 1 V/mA 4. HV ON : When No.1 and No.9 conduct, ...
Description 14 GHz / 123 W CW / LIGHT WEIGHT / COMPACT / EFFICIENT
14 GHz, 123 W CW, LIGHT WEIGHT, COMPACT, EFFICIENT

File Size 122.83K  /  4 Page

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    WEIDA[Weida Semiconductor, Inc.]
Part No. WCSS0418V1F-117 WCSS0436V1P WCSS0418V1F WCSS0418V1F-100AC WCSS0418V1F-100AI WCSS0418V1F-100BGC WCSS0418V1F-100BGI
OCR Text ...tive LOW. Qualified with BWE to conduct byte writes. Sampled on the rising edge. BWS0 controls DQ[7:0] and DP0, BWS1 controls DQ[15:8] and DP1. See Write Cycle Descriptions table for further details. Advance input used to advance the on-chi...
Description 256K x 18 Synchronous 3.3V Cache RAM

File Size 545.78K  /  18 Page

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    CY7C1223H CY7C1223H-133AXC CY7C1223H-133AXI CY7C1223H-166AXC CY7C1223H-166AXI

Cypress Semiconductor
Part No. CY7C1223H CY7C1223H-133AXC CY7C1223H-133AXI CY7C1223H-166AXC CY7C1223H-166AXI
OCR Text ...tive LOW. Qualified with BWE to conduct byte writes to the SRAM. Sampled on the rising edge of CLK. Global Write Enable Input, active LOW. When asserted LOW on the rising edge of CLK, a global write is conducted (ALL bytes are written, rega...
Description 2-Mbit (128K x 18) Pipelined DCD Sync SRAM

File Size 707.01K  /  16 Page

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