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NXP Semiconductors N.V.
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Part No. |
PZ128-S12A84 PZ3128-S10A84
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OCR Text |
...LD (data taken w/eight up/down, loadable 16 bit counters at 3.3V, 25C).
INPUT PIN
tPD_PAL = COMBINATORIAL PAL ONLY tPD_PLA = COMBINATORIAL PAL + PLA
OUTPUT PIN
INPUT PIN
REGISTERED tSU_PAL = PAL ONLY tSU_PLA = PAL + PLA
D
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Description |
IC-SM-CMOS PLD 集成电路钐的CMOS可编程逻辑器件
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File Size |
149.45K /
18 Page |
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it Online |
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Applied Micro Circuits Corp.
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Part No. |
S3031 S3031B
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OCR Text |
...e second register is a parallel loadable shift register which takes its parallel input from the first register. The parallel data transfer between registers is accomplished on the falling edge of REFCLK. The serial data is shifted out at th... |
Description |
E4/STM-1/OC-3 ATM TRANSCEIVER
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File Size |
255.67K /
26 Page |
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it Online |
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Analog Devices, Inc.
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Part No. |
AD606
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OCR Text |
...ow-pass filter and p rovides a loadable output voltage of +0.1 v dc to +4 v dc. the logarith- mic scaling is such that the output is +0.5 v for a sinusoidal in- put of C75 dbm and +3.5 v at an input of +5 dbm; over this range the logarithm... |
Description |
50 MHz, 80 dB Demodulating Logarithmic Amplifier with Limiter Output(50MHz,带限幅输0dB解调对数放大
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File Size |
469.38K /
12 Page |
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it Online |
Download Datasheet
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Price and Availability
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