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Fujitsu Limited
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Part No. |
MB86H21
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OCR Text |
...n integrated S/P-DIF interface, dpll, and internal audio DAC's. This helps to reduce product cost by eliminating the need for external components. The SmartMPEG adds also NDS support, dpll functionality, SECAM encoding, and two Smart-card i... |
Description |
MPEG-2 Decoder with Integrated NDS ICAM
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File Size |
163.01K /
3 Page |
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it Online |
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ZARLINK[Zarlink Semiconductor Inc]
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Part No. |
ZL30122 ZL30122GGG ZL30122GGG2
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OCR Text |
... kHz Digital Phase Locked-Loop (dpll) provides all the features necessary for generating SONET/SDH compliant clocks including automatic hitless reference switching, automatic mode selection (locked, free-run, holdover), and selectable loop ... |
Description |
From old datasheet system SONET/SDH Low Jitter Line Card Synchronizer
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File Size |
250.01K /
23 Page |
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Zarlink Semiconductor
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Part No. |
ZL30102
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OCR Text |
...Circuit
Virtual Reference
dpll
Mode Control
E1 Synthesizer
DS1 Synthesizer DS2 Synthesizer
Frequency Select MUX
IEEE 1149.1a
TRST
MODE_SEL1:0 SEC_MSTR
HMS HOLDOVER
TCK TDI
TMS TDO
Figure 1 - Functional B... |
Description |
Stratum 4/4E Redundant System Clock Synchronizer for T1/E1 and H.110
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File Size |
457.90K /
50 Page |
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PMC-Sierra, Inc.
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Part No. |
PM4541
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OCR Text |
.......................... 3 CLOCK dpll ................................................................................ 3 OSCILLATORS.............................................................................. 3 T1XC DEVICES .................. |
Description |
T1XC EVALUATION DAUGHTER BOARD
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File Size |
525.44K /
46 Page |
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it Online |
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Zarlink
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Part No. |
MT8940 118
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OCR Text |
...k and frame pulse source
F0i dpll #1 C12i 2:1 MUX
CVb Variable Clock Control CV ENCV
MS0 MS1 MS2 MS3 C8Kb Mode Selection Logic Frame Pulse Control Input Selector 4.096 MHz Clock Control dpll #2 Clock Generator Ai Bi 2.048 MHz Clock... |
Description |
ISO-CMOS ST-BUS? FAMILY From old datasheet system
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File Size |
492.69K /
19 Page |
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Maxim Integrated Products, Inc.
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Part No. |
DS3104-SE
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OCR Text |
.......11 TIMING CARD TO LINE CARD dpll FEATURES (T0 dpll)..............................................................11 LINE CARD TO TIMING CARD dpll FEATURES (T4 dpll)..............................................................11 OUTPUT ... |
Description |
Line Card Timing IC with Synchronous Ethernet Support
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File Size |
1,029.11K /
135 Page |
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it Online |
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Price and Availability
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