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For clocks Found Datasheets File :: 21367    Search Time::1.922ms    
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    ACS8520A ACS8520AT

Semtech Corporation
Part No. ACS8520A ACS8520AT
OCR Text ...enerates SONET or SDH Equipment clocks (SEC) and Frame Synchronization clocks. The ACS8520A is fully compliant with the required international specifications and standards. The device supports Free-run, Locked and Holdover modes. It also su...
Description Synchronous Equipment Timing Source for Stratum 3/4E/4 and SMC Systems

File Size 1,961.26K  /  150 Page

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    EXAR[Exar Corporation]
Part No. XRT8000_06 XRT8000 XRT8000ID XRT8000IP
OCR Text ...aneous, very low jitter, output clocks for synchronization applications in wide area networking systems. The outputs are phase locked to the input signal. The chip has four basic modes of operation; referred to as master (FORWARD, REVERSE) ...
Description Clock Synchronizer/Adapter for Communications

File Size 624.22K  /  24 Page

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    EXAR[Exar Corporation]
Part No. XRK32398IL-1 XRK32308 XRK32308_07 XRK32308CD-1 XRK32308CD-1H XRK32308CD-2 XRK32308CD-3 XRK32308CD-4 XRK32308CD-5H XRK32308CDTR-1 XRK32308CDTR-1H XRK32308CDTR-2 XRK32308CDTR-3 XRK32308CDTR-4 XRK32308CDTR-5H XRK32308CG-1H XRK32308CGTR-1H XRK32308CL-1 XRK32308CL-1H XRK32308CL-2 XRK32308CL-3 XRK32308CL-4 XRK32308CL-5H XRK32308ID-1 XRK32308ID-1H XRK32308ID-2 XRK32308ID-3 XRK32308ID-4 XRK32308IDTR-1 XRK32308IDTR-1H XRK32308IDTR-2 XRK32308IDTR-3 XRK32308IDTR-4 XRK32308IG-1H XRK32308IGTR-1H XRK32308IL-1H XRK32308IL-2 XRK32308IL-3 XRK32308IL-4 XRK32308IL-5H 8IGTR-1H
OCR Text ...signed to distribute high-speed clocks in PC, workstation, datacom, telecom, and other high-performance applications. The part has an on-chip PLL which locks to an input clock presented on the REF pin. The PLL feedback is required to be dri...
Description 3.3V ZERO DELAY BUFFER

File Size 104.77K  /  16 Page

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    INTEGRATED DEVICE TECHNOLOGY INC
Part No. 97ULP877BH ICS97ULP877BHLF
OCR Text ...uts are controlled by the input clocks (clk_int, clk_inc), the feedback clocks (fb_int, fb_inc), the lvcmos program pins (oe, os) and the analog power input (avdd). when oe is low, the outputs (except fb_outt/fb_outc) are disabled while the...
Description 97ULP SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52

File Size 238.98K  /  15 Page

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    CY23EP05SXC-1 CY23EP05SXI-1 CY23EP05SXC-1H CY23EP05SXC-1HT CY23EP05SXC-1T CY23EP05SXI-1H CY23EP05SXI-1HT CY23EP05SXI-1T

Cypress Semiconductor
Part No. CY23EP05SXC-1 CY23EP05SXI-1 CY23EP05SXC-1H CY23EP05SXC-1HT CY23EP05SXC-1T CY23EP05SXI-1H CY23EP05SXI-1HT CY23EP05SXI-1T CY23EP05
OCR Text ...istribute low-jitter high-speed clocks and is available in a 8-pin SOIC package. It accepts one reference input, and drives out five low-skew clocks. The -1H version operates up to 220 (200) MHz frequencies at 3.3V (2.5V), and has a higher ...
Description 2.5V or 3.3V,10- 220 MHz, Low Jitter, 5 Output Zero Delay Buffer

File Size 389.14K  /  12 Page

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    CY7C1916JV18-300BZXI CY7C1916JV18-300BZC CY7C1916JV18-300BZI CY7C1916JV18-300BZXC CY7C1320JV18-300BZC CY7C1320JV18-300BZ

Cypress Semiconductor
Part No. CY7C1916JV18-300BZXI CY7C1916JV18-300BZC CY7C1916JV18-300BZI CY7C1916JV18-300BZXC CY7C1320JV18-300BZC CY7C1320JV18-300BZXC CY7C1320JV18-300BZI CY7C1320JV18-300BZXI
OCR Text ...600 mhz) at 300 mhz two input clocks (k and k ) for precise ddr timing ? sram uses rising edges only two input clocks for ou tput data (c and c ) to minimize clock skew and flight time mismatches echo clocks (cq and cq ) simplify data ...
Description 18-Mbit DDR-II SRAM 2-Word Burst Architecture

File Size 407.82K  /  26 Page

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    ETC5054 ETC5054D ETC5054N ETC5057 ETC5057D ETC5057N

意法半导
STMICROELECTRONICS[STMicroelectronics]
SGS Thomson Microelectronics
Part No. ETC5054 ETC5054D ETC5054N ETC5057 ETC5057D ETC5057N
OCR Text ...MHz transmit and receive master clocks, which may be asynchronous, transmit and receive bit clocks which may vary from 64 kHz to 2.048 MHz, and transmit and receive frame sync pulses. The timing of the frame sync pulses and PCM data is comp...
Description CON HDR 10X2 KEY/SHR
SERIAL INTERFACE CODEC/FILTER

File Size 151.91K  /  18 Page

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