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				IDT[Integrated Device Technology]
Part No.	IDT5V9950 IDT5V9950PFI
OCR Text	... hard-wired to appropriate HIGH-MID-LOW levels. When the sOE pin is held low, all the outputs are synchronously enabled. However, if sOE is held high, all the outputs except 2Q0 and 2Q1 are synchronously disabled. Furthermore, when PE is he...
Description	3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK? II JR.
File Size	65.38K / 9 Page	View it Online	Download Datasheet

				IDT[Integrated Device Technology]
Part No.	IDT5V9955 IDT5V9955BFI IDT5V9955BFI8
OCR Text	... hard-wired to appropriate HIGH-MID-LOW levels. The feedback input allows divide-by-functionality from 1 to 12 through the use of the xDS[1:0] inputs. This provides the user with frequency multiplication from 1 to 12 without using divided o...
Description	3.3V Programmable Skew Dual PLL Clock Driver Turboclock II 3.3V PROGRAMMABLE SKEW DUAL PLL CLOCK DRIVER TURBOCLOCK W
File Size	124.58K / 11 Page	View it Online	Download Datasheet

				MOTOROLA[Motorola, Inc]
Part No.	MHW1244 MHW1184 MHW1134 MHW1224 MHW11134 MHW11184
OCR Text	...or use as return amplifiers for mid-split and high-split 2-way cable TV systems. Features all gold metallization system. * Guaranteed Broadb...to Insure Good Low Frequency Gain Stability versus Temperature MHW1134 MHW1184 MHW1224 MHW1244 1...
Description	Low Distortion Wideband Amplifiers
File Size	66.57K / 4 Page	View it Online	Download Datasheet

				Vitesse Semiconductor Corporation. ETC VITESSE[Vitesse Semiconductor Corporation]
Part No.	VSC8164 VSC8164QR SC8164
OCR Text	...and DC-coupled to the part, the mid-point of the input signal swing should be centered about this reference voltage and not exceed the maximum allowable amplitude (VCMI, VIHSDC). For single-ended, DC-coupling operations, it is recommended t...
Description	2.488 Gbit/sec to 2.7Gbit/sec 1:16 SONET/SDH Demux
File Size	152.63K / 16 Page	View it Online	Download Datasheet

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