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Microsemi, Corp.
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Part No. |
MXSMAJP4KE9.1C MXSMAJP4KE9.1CA MXSMAJP4KE9.1CTR MXSMAJP4KE8.2C MXSMAJP4KE8.2CATR MSPSMAJP4KE6.8TR
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OCR Text |
...an d 2. th e p a ckag e i s confi gure d fo r e a sy pick and pl ace onto p c board s for a u t omated ha n d ling. the j- bend te rmina t ions al so p r o v ide stre ss relief for u s e on a variety of pc board m a terial s... |
Description |
400 W, BIDIRECTIONAL, SILICON, TVS DIODE, DO-214AC PLASTIC, DO-214BA, SMAJ, 2 PIN 400 W, UNIDIRECTIONAL, SILICON, TVS DIODE, DO-214AC PLASTIC, DO-214BA, SMAJ, 2 PIN
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File Size |
237.83K /
4 Page |
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Integrated Device Technology, Inc.
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Part No. |
89HPES24T3G2ZCBLGI 89HPES24T3G2ZCALIG 89HPES24T3G2ZCALG
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OCR Text |
...f the serial eeprom from which confi guration information is loaded. msmbclk i/o master smbus clock. this bidirectional signal is used to synchronize transfers on the master smbus. msmbdat i/o master smbus data. this bidirectional sign... |
Description |
PCI BUS CONTROLLER, PBGA676 27 X 27 MM, 1 MM PITCH, GREEN, FCBGA-676 PCI BUS CONTROLLER, PBGA324 19 X 19 MM, 1 MM PITCH, GREEN, FCBGA-324 PCI BUS CONTROLLER, PBGA324 19 X 19 MM, 1 MM PITCH, FCBGA-324
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File Size |
476.54K /
48 Page |
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Diodes, Inc. DIODES INC
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Part No. |
PEEL18LV8ZJ-15 PEEL18LV8ZJI-15L PEEL18LV8ZJ-15L PEEL18LV8ZP-15L PEEL18LV8ZPI-15 PEEL18LV8ZS-15L PEEL18LV8ZSI-15L PEEL18LV8ZPI-15L
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OCR Text |
...ur pal-type output structures (confi gurations 3, 4, 9, and 10), the macrocell provides eight additional configurations. when creating a peel device design, the desired macrocell configuration is generally specified explicitly in the d... |
Description |
EE PLD, 15 ns, PQCC20 PLASTIC, LCC-20 EE PLD, 15 ns, PQCC20 LEAD FREE, PLASTIC, LCC-20 EE PLD, 15 ns, PDIP20 0.300 INCH, LEAD FREE, PLASTIC, DIP-20 EE PLD, 15 ns, PDIP20 0.300 INCH, PLASTIC, DIP-20 EE PLD, 15 ns, PDSO20 0.300 INCH, LEAD FREE, SOIC-20 EE PLD, 15 ns, PDSO20 0.300 INCH, SOIC-20
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File Size |
243.18K /
10 Page |
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Diodes, Inc.
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Part No. |
PEEL18LV8ZJI-35L PEEL18LV8ZSI-35L PEEL18LV8ZT-25L PEEL18LV8ZPI-35 PEEL18LV8ZJ-25 PEEL18LV8ZS-25L PEEL18LV8ZPI-35L
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OCR Text |
...ur pal-type output structures (confi gurations 3, 4, 9, and 10), the macrocell provides eight additional configurations. when creating a peel device design, the desired macrocell configuration is generally specified explicitly in the d... |
Description |
EE PLD, 35 ns, PQCC20 LEAD FREE, PLASTIC, LCC-20 EE PLD, 35 ns, PDSO20 0.300 INCH, LEAD FREE, SOIC-20 EE PLD, 35 ns, PDSO20 0.300 INCH, SOIC-20 EE PLD, 35 ns, PQCC20 PLASTIC, LCC-20 EE PLD, 25 ns, PDSO20 0.170 INCH, LEAD FREE, TSSOP-20 EE PLD, 35 ns, PDIP20 0.300 INCH, PLASTIC, DIP-20 EE PLD, 25 ns, PDSO20 0.170 INCH, TSSOP-20 EE PLD, 25 ns, PQCC20 PLASTIC, LCC-20 EE PLD, 25 ns, PDSO20 0.300 INCH, LEAD FREE, SOIC-20 EE PLD, 35 ns, PDIP20 0.300 INCH, LEAD FREE, PLASTIC, DIP-20 EE PLD, 25 ns, PDSO20 0.300 INCH, SOIC-20
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File Size |
269.76K /
10 Page |
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Integrated Device Technology, Inc.
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Part No. |
5V49EE501NLGI 5V49EE501NLGI8
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OCR Text |
...iders. each output bank can be confi gured to support lvttl, lvpecl, lvds or hcsl logic levels. out0 (output 0) supports 3.3v single ended output only. the outputs are connected to the plls via a switch matrix. the switch matrix allows... |
Description |
5V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC24 4 X 4 MM, ROHS COMPLIANT, VFQFPN-24
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File Size |
283.96K /
33 Page |
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SynQor
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Part No. |
PQ60120QEB25NYS-G
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OCR Text |
...rd quarter-bri ck pin-out confi guration ? industry standard si ze: 1.45 x 2.3 (36.8x58.4mm) ? total hei ght l ess than 0.436 (11.06mm), permi ts better airflow and small er card pitch ? tota... |
Description |
1-OUTPUT 307.5 W DC-DC REG PWR SUPPLY MODULE ROHS COMPLIANT PACKAGE-8
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File Size |
1,019.04K /
13 Page |
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Price and Availability
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