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  4-mbit 512k x 8 static ram Datasheet PDF File

For 4-mbit 512k x 8 static ram Found Datasheets File :: 150+       Page :: | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | <14> | 15 |   

    Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
Part No. CY7C1387D-250AxC CY7C1386D-167BGC CY7C1386D-167BGxI CY7C1386D-167BGI CY7C1386D-167BGxC CY7C1386D-250BGxC CY7C1386D-250BGC CY7C1387D-200BGxI CY7C1387D-250BGxC CY7C1387D-250BZxC CY7C1387D-200BGxC CY7C1387D-200BGI CY7C1386D-200AI CY7C1387D-200AI CY7C1387D-200BGC
Description 18-Mbit (512k x 36/1 Mbit x 18) Pipelined DCD Sync Sram 1M x 18 CACHE Sram, 3 ns, PBGA119
18-Mbit (512k x 36/1 Mbit x 18) Pipelined DCD Sync Sram 1M x 18 CACHE Sram, 2.6 ns, PBGA119
18-Mbit (512k x 36/1 Mbit x 18) Pipelined DCD Sync Sram 1M x 18 CACHE Sram, 2.6 ns, PBGA165
18-Mbit (512k x 36/1 Mbit x 18) Pipelined DCD Sync Sram 512k x 36 CACHE Sram, 3 ns, PQFP100
18-Mbit (512k x 36/1 Mbit x 18) Pipelined DCD Sync Sram 1M x 18 CACHE Sram, 3 ns, PQFP100
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    CY62138EV30 CY62138EV30LL-45BVXI CY62138EV3009

Cypress Semiconductor
Part No. CY62138EV30 CY62138EV30LL-45BVxI CY62138EV3009
Description 2-Mbit (256K x 8) MoBL static ram
2-Mbit (256K x 8) MoBL庐 static ram
2-Mbit (256K x 8) MoBL? static ram
2-Mbit (256K x 8) MoBL㈢ static ram
File Size 435.81K  /  9 Page

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    Cypress Semiconductor Corp.
Part No. CY7C1460AV33
Description 36-Mbit (1M x 36/2M x 18/512k x 72) Pipelined Sram with NoBL Architecture(带NoBL结构6-Mbit (1M x 36/2M x 18/512k x 72) Pipelined Sram)
File Size 466.88K  /  27 Page

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    Cypress Semiconductor Corp.
Part No. CY7C1460AV25 CY7C1462AV25
Description 36-Mbit (1M x 36/2M x 18/512k x 72) Pipelined Sram with NoBL Architecture(带NoBL结构6-Mbit (1M x 36/2M x 18/512k x 72) Pipelined Sram)
File Size 464.68K  /  27 Page

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    Renesas Electronics Corporation.
Renesas Electronics, Corp.
Part No. M38030F2L-xxxHP M38030F2L-xxxKP M38030F2L-xxxSP M38030F2L-xxxWG M38030MAL-xxxWG M38030MAL-xxxKP M38030FAL-xxxSP M38031FAL-xxxHP M38030FAL-xxxWG M38030MAL-xxxHP M38030FAL-xxxKP M38031FAL-xxxKP M38030FAL-xxxHP M38031FAL-xxxSP M38031FAL-xxxWG M38030MAL-xxxSP M38030F3L-xxxHP M38030F3L-xxxWG M38030M3L-xxxKP M38030F3L-xxxSP M38030F3L-xxxKP M38030M3L-xxxHP M38030FBL-xxxWG M38030MBL-xxxHP M38030FBL-xxxHP M38030FBL-xxxSP M38030MBL-xxxKP M38030M2L-xxxHP M38030M2L-xxxKP M38030M2L-xxxSP M38030M2L-xxxWG M38031F2L-xxxHP M38031F2L-xxxKP M38031F2L-xxxSP M38031F2L-xxxWG M38030FB-xxxHP M38031FBL-xxxSP M38035MBL-xxxSP M38038FBL-xxxSP M38039FBL-xxxSP M38030MBL-xxxSP M38036MBL-xxxSP M38037FBL-xxxSP M38037MBL-xxxSP M38036FBL-xxxSP M38038MBL-xxxSP M38031FC-xxxHP M38031FC-xxxKP M38031FC-xxxWG M38031FCL-xxxHP M38031FCL-xxxKP M38031FCL-xxxSP M38031FCL-xxxWG M38031F5-xxxKP M38031F5-xxxSP M38031F5-xxxWG M38031F5L-xxxHP M38031F5L-xxxKP M38031F5L-xxxSP M38031F5L-xxxWG M38030F1-xxxHP M38030F1-xxxKP M38030F1-xxxSP M38030F1-xxxWG M38030F1L-xxxHP M38030F1L-xxxKP M38030F1L-xxxSP M38030F1L-xxxWG M38031F1-xxxKP M38031F1-xxxWG M38031F1L-xxxHP M38031F1L-xxxKP M38031F6-xxxHP M38031F6-xxxKP M38031F6-xxxSP M38031F6-xxxWG M
Description 256 Kbit (32K x 8) nvSram; Organization: 32Kb x 8; Vcc (V): 2.7 to 3.6 V; Density: 256 Kb; Package: SOIC
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: 0 to 70 C
256K (32K x 8) static ram; Density: 256 Kb; Organization: 32Kb x 8; Vcc (V): 4.50 to 5.50 V;
Three-PLL General Purpose FLASH Programmable Clock Generator; Voltage (V): 3.3 V; Input Range: 1 MHz to 166 MHz; Output Range: 1 MHz to 200 MHz; Outputs: 6
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 256; Vcc (V): 3.3; fMax (MHz): 66; tPD (ns): 12
8-Mbit (512k x 16) static ram; Density: 8 Mb; Organization: 512kb x 16; Vcc (V): 2.20 to 3.60 V;
9-Mbit (256K x 36/512k x 18) Pipelined Sram; Architecture: Standard Sync, Pipeline SCD; Density: 9 Mb; Organization: 512kb x 18; Vcc (V): 3.1 to 3.6 V
9-Mbit (256K x 36/512k x 18) Flow-Through Sram; Architecture: Standard Sync, Flow-through; Density: 9 Mb; Organization: 512kb x 18; Vcc (V): 3.1 to 3.6 V
18-Mbit QDR(TM)-II Sram 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 18 Mb; Organization: 512kb x 36; Vcc (V): 1.7 to 1.9 V
Four Output PCI-x and General Purpose Buffer; Voltage (V): 3.3 V; Frequency Range: 0 MHz to 140 MHz; Outputs: 4; Operating Range: 0 to 70 C
18-Mbit QDR(TM)-II Sram 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 18 Mb; Organization: 512kb x 36; Vcc (V): 1.7 to 1.9 V
9-Mbit (256K x 36/512k x 18) Flow-Through Sram with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 9 Mb; Organization: 512kb x 18; Vcc (V): 3.1 to 3.6 V
9-Mbit (256K x 36/512k x 18) Pipelined Sram with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 9 Mb; Organization: 512kb x 18; Vcc (V): 2.4 to 2.6 V
4-mbit (512k x 8) static ram; Density: 4 Mb; Organization: 512kb x 8; Vcc (V): 4.50 to 5.50 V;
4-mbit (256K x 16) static ram; Density: 4 Mb; Organization: 256Kb x 16; Vcc (V): 2.20 to 3.60 V;
64K x 16 static ram; Density: 1 Mb; Organization: 64Kb x 16; Vcc (V): 3.0 to 3.6 V;
1-Mbit (64K x 16) static ram; Density: 1 Mb; Organization: 64Kb x 16; Vcc (V): 4.5 to 5.5 V;
9-Mbit (256K x 36/512k x 18) Pipelined Sram; Architecture: Standard Sync, Pipeline SCD; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V
1-Mbit (64K x 16) static ram; Density: 1 Mb; Organization: 64Kb x 16; Vcc (V): 3.0 to 3.6 V;
4 Mbit (512k x 8/256K x 16) nvSram; Organization: 512kb x 8; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: TSOP
4 Mbit (512k x 8/256K x 16) nvSram; Organization: 256Kb x 16; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: TSOP
16-Mbit (1M x 16 / 2M x 8) static ram; Density: 16 Mb; Organization: 1Mb x 16; Vcc (V): 4.50 to 5.50 V;
4K x 16/18 and 8K x 16/18 Dual-Port static ram with SEM, INT, BUSY; Density: 128 Kb; Organization: 8Kb x 16; Vcc (V): 4.5 to 5.5 V; Speed: 35 ns
9-Mbit (256K x 36/512k x 18) Pipelined Sram with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V
9-Mbit (256K x 36/512k x 18) Flow-Through Sram with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V
9-Mbit (256K x 36/512k x 18) Pipelined Sram with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 2.4 to 2.6 V
9-Mbit (256K x 36/512k x 18) Pipelined Sram with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 9 Mb; Organization: 512kb x 18; Vcc (V): 3.1 to 3.6 V
8-Mbit (512k x 16) static ram; Density: 8 Mb; Organization: 512kb x 16; Vcc (V): 4.50 to 5.50 V;
9-Mbit (256K x 36/512k x 18) Flow-Through Sram; Architecture: Standard Sync, Flow-through; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V
256K x 16 static ram; Density: 4 Mb; Organization: 256Kb x 16; Vcc (V): 4.5 to 5.5 V;
9-Mbit (256K x 36/512k x 18) Pipelined DCD Sync Sram; Architecture: Standard Sync, Pipeline DCD; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V
4-mbit (256K x 16) static ram; Density: 4 Mb; Organization: 256Kb x 16; Vcc (V): 3.0 to 3.6 V;
8-Mbit (1024K x 8) static ram; Density: 8 Mb; Organization: 1Mb x 8; Vcc (V): 2.20 to 3.60 V;
18-Mbit (512k x 36/1M x 18) Pipelined Sram with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 18 Mb; Organization: 512kb x 36; Vcc (V): 3.1 to 3.6 V
256K x 16 static ram; Density: 4 Mb; Organization: 256Kb x 16; Vcc (V): 3.0 to 3.6 V;
8-Mbit (1M x 8) static ram; Density: 8 Mb; Organization: 1Mb x 8; Vcc (V): 2.20 to 3.60 V;
3.3V Zero Delay Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 8; Operating Range: -40 to 85 C
Programmable Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: -40 to 85 C
18-Mbit (512k x 36/1M x 18) Flow-Through Sram with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 18 Mb; Organization: 512kb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512k x 36/1M x 18) Pipelined Sram with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
512k x 8 static ram; Density: 4 Mb; Organization: 512kb x 8; Vcc (V): 4.5 to 5.5 V;
18-Mbit (512k x 36/1M x 18) Pipelined Sram with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 18 Mb; Organization: 512kb x 36; Vcc (V): 2.4 to 2.6 V
2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 12; Operating Range: -40 to 85 C
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: -40 to 85 C
2M x 8 static ram; Density: 16 Mb; Organization: 2Mb x 8; Vcc (V): 3.0 to 3.6 V;
16 Mbit (512k x 32) static ram; Density: 16 Mb; Organization: 512kb x 32; Vcc (V): 3.0 to 3.6 V;
3.3V Zero Delay Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 8; Operating Range: 0 to 70 C
8-Mbit (1M x 8) static ram; Density: 8 Mb; Organization: 1Mb x 8; Vcc (V): 3.0 to 3.6 V;
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 5; fMax (MHz): 125; tPD (ns): 6
2-Mbit (128K x 16) static ram; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 3.0 to 3.6 V;
16-Mbit (1M x 16) static ram; Density: 16 Mb; Organization: 1Mb x 16; Vcc (V): 3.0 to 3.6 V;
4-mbit (256K x 18) Pipelined DCD Sync Sram; Architecture: Standard Sync, Pipeline DCD; Density: 4 Mb; Organization: 256Kb x 18; Vcc (V): 3.1 to 3.6 V
512k (32K x 16) static ram; Density: 512 Kb; Organization: 32Kb x 16; Vcc (V): 3.0 to 3.6 V;
4-mbit (128K x 36) Pipelined Sram with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 4 Mb; Organization: 128Kb x 36; Vcc (V): 3.1 to 3.6 V
1M x 16 static ram; Density: 16 Mb; Organization: 1Mb x 16; Vcc (V): 3.0 to 3.6 V;
Programmable Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: 0 to 70 C
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 9; Operating Range: 0 to 70 C
MoBL(R) 2 Mbit (128K x 16) static ram; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 2.20 to 3.60 V;
rambus(R) xDR(TM) Clock Generator; VDD: 2.5 V; Input Frequency: 100 MHz to 133 MHz; Output Frequency: 300 MHz to 800 MHz; # Out: 4
2-Mbit (128K x 16) static ram; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 2.20 to 3.60 V;
4-mbit (128K x 36) Pipelined Sync Sram; Architecture: Standard Sync, Pipeline SCD; Density: 4 Mb; Organization: 128Kb x 36; Vcc (V): 3.1 to 3.6 V
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 5; fMax (MHz): 167; tPD (ns): 7
2.5V or 3.3V, 200-MHz, 1:10 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 10; Operating Range: 0 to 70 C
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 5; fMax (MHz): 100; tPD (ns): 7
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 5; fMax (MHz): 125; tPD (ns): 7
18-Mbit DDR-II Sram 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 18 Mb; Organization: 512kb x 36; Vcc (V): 1.7 to 1.9 V
Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: 0 to 70 C
Spread Spectrum Clock Generator; Voltage(V): 3.3 V; Input Frequency Range: 25 MHz to 100 MHz; Output Frequency Range: 25 MHz to 100 MHz; Operating Range: 0 to 70 C; Package: SOIC
Low Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: 0 to 70 C
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 3.3; fMax (MHz): 143; tPD (ns): 9 单芯位CMOS微机
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 5; fMax (MHz): 154; tPD (ns): 6 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 3.3; fMax (MHz): 100; tPD (ns): 9 单芯位CMOS微机
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 3.3; fMax (MHz): 83; tPD (ns): 10 单芯位CMOS微机
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 5; fMax (MHz): 125; tPD (ns): 6 单芯位CMOS微机
Three-PLL General-Purpose EPROM Programmable Clock Generator; Voltage (V): 3.3/5.0 V; Input Range: 1 MHz to 30 MHz; Output Range: .077 MHz to 100 MHz; Outputs: 6 单芯位CMOS微机
8-Mbit (512k x 16) MoBL(R) static ram; Density: 8 Mb; Organization: 512kb x 16; Vcc (V): 2.20 to 3.60 V; 单芯位CMOS微机
High Speed Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 3.75 MHz to 110 MHz; Outputs: 8; Operating Range: 0 to 70 C 单芯位CMOS微机
3.3V SDram Buffer for Mobile PCs with 4 SO-DIMMs; Voltage (V): 3.3 V; Frequency Range: 0 MHz to 100 MHz; Outputs: 10; Operating Range: 0 to 70 C 单芯位CMOS微机
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 9; Operating Range: -40 to 85 C 单芯位CMOS微机
Programmable Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: -40 to 85 C 单芯位CMOS微机
2-Mbit (128K x 16) static ram; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 3.0 to 3.6 V; 单芯位CMOS微机
MoBL(R) 1 Mbit (128K x 8) static ram; Density: 1 Mb; Organization: 128Kb x 8; Vcc (V): 2.20 to 3.60 V; 单芯位CMOS微机
18-Mbit QDR(TM)-II Sram 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
1-Mbit (128K x 8) static ram; Density: 1 Mb; Organization: 128Kb x 8; Vcc (V): 4.50 to 5.50 V; 单芯位CMOS微机
4-mbit (256K x 18) Pipelined Sync Sram; Architecture: Standard Sync, Pipeline SCD; Density: 4 Mb; Organization: 256Kb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
2-Mbit (64K x 32) Pipelined Sync Sram; Architecture: Standard Sync, Pipeline SCD; Density: 2 Mb; Organization: 64Kb x 32; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
200-MHz Field Programmable Zero Delay Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 10 MHz to 200 MHz; Outputs: 12; Operating Range: -40 to 85 C 单芯位CMOS微机
2-Mbit (128K x 16) static ram; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 2.20 to 3.60 V; 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
2-Mbit (256K x 8) static ram; Density: 2 Mb; Organization: 256Kb x 8; Vcc (V): 2.20 to 3.60 V; 单芯8位CMOS微机
Very Low Jitter Field and Factory Programmable Clock Generator; Voltage (V): 3.3 V; Input Range: 10 MHz to 133 MHz; Output Range: 20 MHz to 200 MHz; Outputs: 2 单芯位CMOS微机
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: 0 to 70 C 单芯位CMOS微机
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: -40 to 85 C 单芯位CMOS微机
Three-PLL General Purpose FLASH Programmable Clock Generator; Voltage (V): 3.3 V; Input Range: 1 MHz to 166 MHz; Output Range: 0 MHz to 200 MHz; Outputs: 3 单芯位CMOS微机
1:8 Clock Fanout Buffer; Voltage (V): 3.3 V; Frequency Range: 0 MHz to 350 MHz; Outputs: 8; Operating Range: -40 to 85 C 单芯位CMOS微机
Quad PLL Clock Generator with 2-Wire Serial Interface; Voltage (V): 2.5/3.3 V; Input Range: 27 MHz to 27 MHz; Output Range: 4.2 MHz to 166 MHz; Outputs: 5 单芯位CMOS微机
2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 12; Operating Range: 0 to 70 C 单芯位CMOS微机
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 9; Operating Range: 0 to 70 C 单芯位CMOS微机
High Speed Multi-phase PLL Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 24 MHz to 200 MHz; Outputs: 11; Operating Range: 0 to 70 C 单芯位CMOS微机
2.5V or 3.3V, 200-MHz, 1:18 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 18; Operating Range: -40 to 85 C 单芯位CMOS微机
-bit AVR Microcontroller with 8K Bytes In- System Programmable Flash 位AVR微控制器具有8K字节的系统内可编程闪
2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 12; Operating Range: 0 to 70 C
1:8 Clock Fanout Buffer; Voltage (V): 3.3 V; Frequency Range: 0 MHz to 350 MHz; Outputs: 8; Operating Range: 0 to 70 C
Spread Spectrum Clock Generator; Voltage(V): 3.3 V; Input Frequency Range: 4 MHz to 32 MHz; Output Frequency Range: 4 MHz to 32 MHz; Operating Range: 0 to 70 C; Package: SOIC
High Speed Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 3.75 MHz to 110 MHz; Outputs: 8; Operating Range: 0 to 70 C
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 3.3; fMax (MHz): 100; tPD (ns): 9
File Size 1,602.57K  /  119 Page

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    CY7C1386D-200AXI CY7C1387F-167BGC CY7C1387F-167BGI CY7C1387F-167BGXC CY7C1387F-167BGXI CY7C1387F-200BGC CY7C1387F-200BGI

Cypress Semiconductor
Part No. CY7C1386D-200AxI CY7C1387F-167BGC CY7C1387F-167BGI CY7C1387F-167BGxC CY7C1387F-167BGxI CY7C1387F-200BGC CY7C1387F-200BGI CY7C1387F-200BGxC CY7C1387F-200BGxI CY7C1387F-250BGC CY7C1387F-250BGI CY7C1387F-250BGxC CY7C1387F-250BGxI CY7C1386D-250AxC CY7C1386D-250AxI CY7C1387D-167AxC CY7C1387D-167AxI CY7C1387D-167BZC CY7C1387D-167BZI CY7C1387D-167BZxC CY7C1387D-167BZxI CY7C1387D-200AxC CY7C1387D-200AxI CY7C1387D-200BZC CY7C1387D-200BZI CY7C1387D-200BZxC
Description 18-Mbit (512k x 36/1 Mbit x 18) Pipelined DCD Sync Sram
File Size 1,031.81K  /  30 Page

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    CY7C1386F-167BGXC CY7C1386F-167BGXI CY7C1386F-200BGC CY7C1386F-200BGI CY7C1386F-200BGXC CY7C1386F-200BGXI CY7C1386F-250B

Cypress Semiconductor
Part No. CY7C1386F-167BGxC CY7C1386F-167BGxI CY7C1386F-200BGC CY7C1386F-200BGI CY7C1386F-200BGxC CY7C1386F-200BGxI CY7C1386F-250BGC CY7C1386F-250BGxC CY7C1386F-250BGxI CY7C1386F-167BGC CY7C1386F-167BGI CY7C1386D-250BZI CY7C1386D-250BZxI CY7C1387D-250BZI CY7C1387D-250BZxI CY7C1386F-250BGI
Description 18-Mbit (512k x 36/1 Mbit x 18) Pipelined DCD Sync Sram
File Size 1,037.75K  /  30 Page

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    CY7C1386D-250AXC ICY7C1387D-167BGI ICY7C1387D-167BGXI CY7C1386D-167AXC CY7C1386D-167AXI CY7C1386D-167BGC CY7C1386D-167BG

Cypress Semiconductor
Part No. CY7C1386D-250AxC ICY7C1387D-167BGI ICY7C1387D-167BGxI CY7C1386D-167AxC CY7C1386D-167AxI CY7C1386D-167BGC CY7C1386D-167BGI CY7C1386D-167BGxC CY7C1386D-167BGxI CY7C1386D-167BZC CY7C1386D-167BZI CY7C1386D-167BZxC CY7C1386D-167BZxI CY7C1386D-200AI CY7C1386D-200AxC CY7C1386D-200BGC CY7C1386D-200BGI CY7C1386D-200BGxC CY7C1386D-200BGxI CY7C1386D-200BZC CY7C1386D-200BZI CY7C1386D-200BZxC CY7C1387D-167BGC CY7C1387D-167BGxC CY7C1387D-200AI CY7C1387D-200BGC CY7C1387D-200BGI CY7C1387D-200BGxC CY7C1387D-200BGxI CY7C1386D-250BGC CY7C1386D-250BGxC CY7C1386D-250BZC CY7C1386D-250BZxC CY7C1387D-250BGC CY7C1387D-250BZC CY7C1387D-250BZxC CY7C1387D-200BZxI CY7C1387D-250BGxC
Description 18-Mbit (512k x 36/1 Mbit x 18) Pipelined DCD Sync Sram
File Size 459.05K  /  29 Page

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    Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
Part No. CY7C1361C-133AxC CY7C1361C-133BGI CY7C1361C-133AJxC CY7C1361C-133AJxI CY7C1361C-133AxI CY7C1361C-133BGC CY7C1361C-133BGxI CY7C1361C-133BGxC CY7C1361C-100BGI CY7C1361C-100AxI CY7C1361C-100AxC CY7C1361C-100BGxI CY7C1361C-100BZxC CY7C1361C-133BZI CY7C1361C-133BZC CY7C1361C-133BZxC
Description 9-Mbit (256K x 36/512k x 18) Flow-Through Sram 256K x 36 CACHE Sram, 8.5 ns, PBGA119
9-Mbit (256K x 36/512k x 18) Flow-Through Sram 256K x 36 CACHE Sram, 8.5 ns, PBGA165
9-Mbit (256K x 36/512k x 18) Flow-Through Sram 9兆位56 × 36/512k × 18）流通过的Sram
9-Mbit (256K x 36/512k x 18) Flow-Through Sram 256K x 36 CACHE Sram, 6.5 ns, PBGA165
File Size 514.96K  /  31 Page

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    AB28F400BX-T90 A28F400BX-B AB28F400BX-B90

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Intel Corporation
Intel Corp.
Intel, Corp.
Part No. AB28F400Bx-T90 A28F400Bx-B AB28F400Bx-B90
Description 4-mbit 256K x16, 512k x8 BOOT BLOCK FLASH MEMORY FAMILY
4-mbit 256K x16/ 512k x8 BOOT BLOCK FLASH MEMORY FAMILY
JT 23C 2#16 21#20 SKT RECP
JT 32C 32#20 PIN RECP
4-mbit (256K x16. 512k x8) BOOT BLOCK FLASH MEMORY FAMILY 4兆位56K x16。为512k × 8）启动块闪存系列
4-mbit (256K x16, 512k x8) BOOT BLOCK FLASH MEMORY FAMILY
File Size 466.62K  /  34 Page

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Price and Availability
 
Price & Availability of 4-mbit 512k x 8 static ram

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