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ST Microelectronics
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| Part No. |
TDA9106
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| OCR Text |
...loop . geometry tracking with v-pos & amp . i 2 c controls : v-amp, v-pos, s-corr, c-corr i 2 c geometry corrections . vertical parabola gen...lock unlock outputs . read/write i 2 c interface . horizontal moire or dac output this is advance in... |
| Description |
LOW-COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
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| File Size |
1,041.82K /
30 Page |
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it Online |
Download Datasheet
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SAMSUNG SEMICONDUCTOR CO. LTD.
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| Part No. |
KA2511B
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| OCR Text |
...loop ? geometry tracking with v-pos & amp ? i 2 c controls : v-amp, v-pos, s-corr, c-corr (i 2 c geometry corrections) ? vertical parabo...lock/unlock outputs ? read/write i 2 c interface ? vertical moire ? b+ regulator -internal pwm gener... |
| Description |
DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
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| File Size |
344.19K /
35 Page |
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it Online |
Download Datasheet |
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SAMSUNG SEMICONDUCTOR CO. LTD.
Samsung Semiconductor Co., Ltd.
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| Part No. |
S1D2511B01-A0 MC14528 S1D2511B01-A0B0
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| OCR Text |
...loop ? geometry tracking with v-pos & amp ? i 2 c controls : v-amp, v-pos, s-corr, c-corr (i 2 c geometry corrections) ? vertical parabo...lock/unlock outputs ? read/write i 2 c interface ? vertical moire ? b+ regulator -internal pwm gener... |
| Description |
DEFLECTION PROCESSOR FOR MULTISYNC MONITORS 偏转处理器多同步监测
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| File Size |
335.25K /
34 Page |
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it Online |
Download Datasheet |
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Motorola
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| Part No. |
MPC9993
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| OCR Text |
...for at least one Ext_FB period (Pos to Pos or Neg to Neg). Cleared (L) on assertion of Alarm_Reset. Control Functions Sel_Clk: Sel_Clk (L) s...Lock 1. While the MPC9993 is receiving a valid CLK signal, assert Man_Override HIGH. 2. The PLL will... |
| Description |
Intelllgent Dynamlc Clock Swltch(IDCS) PLL Clock Drlver
From old datasheet system
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| File Size |
109.55K /
8 Page |
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it Online |
Download Datasheet |
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Motorola
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| Part No. |
MPC993
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| OCR Text |
...for at least one Ext_FB period (Pos to Pos or Neg to Neg). Cleared (L) on assertion of Alarm_Reset. Control Functions Sel_Clk: Sel_Clk (L) s...Lock 1. While the MPC993 is receiving a valid CLK signal, assert Man_Override HIGH. 2. The PLL will ... |
| Description |
Intelllgent Dynamlc Clock Swltch(IDCS) PLL Clock Drlver
From old datasheet system
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| File Size |
93.21K /
8 Page |
View
it Online |
Download Datasheet |
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Panasonic Corporation
PANASONIC[Panasonic Semiconductor]
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| Part No. |
AN5491 AN5491K
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| OCR Text |
...CO
H-OSC 42 EW H-WID Phase V-POS out Parallel out POL V EHT-AC EHT out correction
V- EHT H- EHT 4 2 5 V-amp.
Gain-SW Latch-SW V-latch...Lock det. H-output H-duty H-AFC2 FBP input H-OSC Description
AN5491K
I2C SCL input DEF VCC (9 ... |
| Description |
Synchronous signal and deflection distortion correction processing IC supporting I2C bus for HD wide television
Synchronous signal and deflection distortion correction processing IC supporting I2C bus for HD, wide television
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| File Size |
151.43K /
17 Page |
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it Online |
Download Datasheet |
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