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Lattice Semiconductor, Corp. Lattice Semiconductor Corporation http://
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Part No. |
ORLI10G-2BM680I ORLI10G-3BMN680C ORLI10G-1BM680I ORLI10G-1BMN680C ORLI10G-1BMN680I ORLI10G-2BMN680C ORLI10G-2BM680C ORLI10G-1BM680C ORLI10G-2BMN680I ORLI10G-3BM680C
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OCR Text |
...pecl, SSTL3/2 (class I and II), hstl (Class I, III, IV), ZBT, and DDR. - Double-ended: LVDS, bused-LVDS, LVpecl. Programmable (on/off) inter...pecl (OC-48/STM-16 SONET/SDH) -- USER DEFINED
RECEIVE PLLs RECEIVE DATA 16 x 622 OR 16 x 645 OR 1... |
Description |
FPGA, PBGA680 LEAD FREE, PLASTIC, FPBGA-680 FPGA, PBGA680 PLASTIC, FPBGA-680 FPGA, 1296 CLBS, 380000 GATES, PBGA680 PLASTIC, MULTILAYER, BGA-680 Quad 2.5Gbps, 10Gbps Quad 3.125Gbps, 12.5Gbps Line Interface FPSC
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File Size |
440.07K /
80 Page |
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LATTICE SEMICONDUCTOR CORP
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Part No. |
OR4E02 OR4E02-1BA352I OR4E02-1BM416C OR4E02-1BM416I OR4E02-1BM680C OR4E02-1BM680I OR4E02-2BA352I OR4E02-2BM416C OR4E02-2BM416I OR4E02-2BM680C OR4E02-2BM680I OR4E02-3BM416C OR4E02-3BM680C OR4E04 OR4E04-1BA352I OR4E04-1BM416C OR4E04-1BM416I OR4E04-1BM680C OR4E04-1BM680I OR4E04-2BA352I OR4E04-2BM416C OR4E04-2BM416I OR4E04-2BM680C OR4 OR4E04-3BM416C OR4E04-2BM680I OR4E04-3BM680C
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OCR Text |
...pecl, SSTL3/2 (class I and II), hstl (Class I, III, and IV), ZBT, and DDR. -- Double-ended: LDVS, bused-LVDS, and LVpecl. Programmable (on/off) internal parallel termination (100 ) also supported for these I/Os.
Programmable Features
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Description |
FPGA, 1296 CLBS, 333000 GATES, PBGA416 FPGA, 1296 CLBS, 333000 GATES, PBGA680 ORCASeries 4 FPGAs
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File Size |
1,044.32K /
152 Page |
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Lattice Semiconductor
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Part No. |
ORSPI4
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OCR Text |
...CMOS, GTL, GTL+, pecl, SSTL3/2, hstl, ZBT, DDR, LVDS, bused-LVDS, and LVpecl 1036-pin ftSBGA package provides enough FPGA user I/Os (498) for 4 full-duplex XGMII interfaces, 4 full-duplex PL-3 interfaces, etc; a 40% smaller 1156-pin fpBGA p... |
Description |
Dual SPI4 Interface and High-Speed SERDES FPSC
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File Size |
1,147.30K /
263 Page |
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it Online |
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Micrel Semiconductor
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Part No. |
MIC5164 MIC5164YMM
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OCR Text |
...R, DDR2, DDR3, SCSI, GTL, SSTL, hstl, LV-TTL, Rambus, LV-pecl, LV-ECL, etc) with a Power Good (PG) signal. The MIC5164 controls two external N-Channel MOSFETs to form two separate regulators. It operates by switching between either the high... |
Description |
Dual Regulator Controller for DDR3 GDDR3/4/5 Memory and High-Speed Bus Termination
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File Size |
1,049.18K /
23 Page |
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it Online |
Download Datasheet |
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Price and Availability
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