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Mitsumi
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Part No. |
MM1075
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OCR Text |
...old CK input current Symbol ICC vsl VSH VS/ T VHYS VTH IIH IIL VOH1 VOH2 VOL1 Output voltage (Low) VOL2 VOL3 VOL4 Output sink current IOL1 IOL2 ICT1 CT charge current 1
(Except where noted otherwise, Ta=25C, VCC=5V)
Measurement circui... |
Description |
System Reset (with built-in watchdog timer) From old datasheet system
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File Size |
122.50K /
10 Page |
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Mitsumi
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Part No. |
MM1145
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OCR Text |
...es Table
Model MM1145A MM1145B vsl 4.2 TPR 100ms 40ms TWD 50ms 110ms TWR 10ms 10ms
vsl : Reset detection voltage TPR : Reset hold time during Vcc rise TWD : Watchdog timer monitoring time TWR : Reset time
*CT=0.02F, RCT=1M
MITSUMI... |
Description |
System Reset (with built-in watchdog timer) From old datasheet system
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File Size |
106.10K /
7 Page |
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Philips
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Part No. |
TEA1103TS TEA1103T TEA1103 TEA1103_3
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OCR Text |
...CONVERTER 12 VP SUPPLY BLOCK 13 vsl 16 VS 3 GND 11 FCT
TIMER AND CHARGE STATUS INDICATION
5
6 7
POD PTD
TEA1103; TEA1103T; TEA1103TS
MBH547
Preliminary specification
Philips Semiconductors
Preliminary specificatio... |
Description |
Fast charge ICs for NiCd and NiMH From old datasheet system
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File Size |
211.97K /
28 Page |
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Philips
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Part No. |
SA56616-XX SA56615-XX SA56615-XX_SA56616-XX_1
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OCR Text |
...= 10 V -40 C Tamb 85 C VDD = (vsl) - 0.13 V VDD = (vsl) + 2.0 V Nch: VDS = 0.05 V; VDD = 0.7 V VDD = 1.5 V; Nch: VDS = 0.05 V; VDD = 1.5 V VDD = 4.5 V; Pch: VDS = -2.1 V (Note 1) VDD = (vsl) x 1.1 V VDS = 0.1 V; VDD = 0.7 V VDS = 0.5 V; V... |
Description |
CMOS system reset with adjustable delay time From old datasheet system
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File Size |
230.27K /
24 Page |
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Philips
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Part No. |
SA56614-XX SA56614-XX_3
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OCR Text |
...HYSTERESIS (mV) VS(HYS) = VSH - vsl (VCC RISING - VCC FALLING) 150
3.0 VDS = 0.5 V I DS , OUTPUT FET CURRENT (mA) 2.5
2.0 N-CHANNEL 1.5
100
1.0 P-CHANNEL 0.5
50
0 -50
-25
0
25
50
75
100
125
0 -50
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Description |
CMOS system reset From old datasheet system
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File Size |
114.73K /
12 Page |
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Philips
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Part No. |
SA56613-XX SA56613-XX_1
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OCR Text |
...s LOW. C: At "C", VOUT is above vsl and the delay time, tPLH elapses. At this instant, the device releases the hold on the RESET. The reset output then goes HIGH. In a microprocessor based system these events release the reset from the micr... |
Description |
5 V, 150 mA LDO and independent delayed RESET From old datasheet system
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File Size |
107.73K /
12 Page |
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Atmel
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Part No. |
U4223B
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OCR Text |
...
SL
AGC hold mode: SL high (vsl = VCC) sets normal function, SL low (vsl = 0) disconnects the rectifier and holds the voltage VINT at the integrator output and also the AGC amplifier gain.
VCC
SL Q1A Q1B
Figure 8.
GND
Figure ... |
Description |
Time-Code Receiver with A/D Converter
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File Size |
134.00K /
18 Page |
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it Online |
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