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timeslot Datasheet PDF File

For timeslot Found Datasheets File :: 346 Search Time::2.781ms
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				pmc
Part No.	2000327
OCR Text	...or/ (STS/ Monitor AU-TU3) Tx timeslot Interchange 4 x Serial 155.52 Mbit/s Tx Line Interface Tx Section OH Processor Tx TelecomBus System Interface Tx Line OH Processor Transmit Path Processing Slice 8-bit x 77.76 Mb...
Description	From old datasheet system
File Size	27.04K / 2 Page	View it Online	Download Datasheet

				PMC[PMC-Sierra, Inc]
Part No.	PM6344 PM6344-RI
OCR Text	... jitter and wander attenuation. timeslot 16 AIS, remote alarm, and remote multiframe alarm. * Provides a digital PLL for generation of a low jitter transmit clock. * Provides a FIFO buffer for jitter attenuation and transmit rate conversion...
Description	QUADRUPLE E1 FRAMER Quad E1 Framer
File Size	64.04K / 2 Page	View it Online	Download Datasheet

				Conexant Systems, Inc
Part No.	RS8953 RS8953BEPJ RS8953BEPF RS8953SPBEPJ RS8953B RS8953SPB
OCR Text	...or, Bit Error Rate (BER) meter, timeslot router, Digital Phase Lock Loop (DPLL) clock recovery, and PCM Loopbacks (LB). Three groups of HDSL channel registers configure the elastic store FIFOs, overhead MUXes, receive framers, payload mappe...
Description	From old datasheet system High-Bit-Rate Digital Subscriber Line (HDSL) channel unit
File Size	1,183.15K / 173 Page	View it Online	Download Datasheet

				EXAR[Exar Corporation]
Part No.	XRT84L38IB XRT84L38
OCR Text	... contains two 96-BYTE buffers * timeslot assignable HDLC * V5.1 and V5.2 Interface * 8-bit Intel/Motorola P and MIPS Power PC interfaces for configuration, control and status monitoring * Parallel search algorithm for fast frame synchroniza...
Description	OCTAL T1/E1/J1 FRAMER
File Size	2,318.87K / 451 Page	View it Online	Download Datasheet

				EXAR[Exar Corporation]
Part No.	XRT86VL34IB XRT86VL3X XRT86VL38IB484 XRT86VL38IB XRT86VL32IB
OCR Text	... HDLC Controllers Support SS7 * timeslot assignable HDLC * V5.1 or V5.2 Interface * Automatic Performance Report Generation (PMON Status) can be inserted into the transmit LAPD interface every 1 second or for a single transmission * Dig...
Description	T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
File Size	1,329.54K / 149 Page	View it Online	Download Datasheet

				Exar Corporation
Part No.	XRT86VL34
OCR Text	... HDLC Controllers Support SS7 * timeslot assignable HDLC * V5.1 or V5.2 Interface * Automatic Performance Report Generation (PMON Status) can be inserted into the transmit LAPD interface every 1 second or for a single transmission * Ala...
Description	QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
File Size	795.08K / 174 Page	View it Online	Download Datasheet

				Integrated Device Technology IDT
Part No.	IDT72V8980 IDT72V8980DB IDT72V8980J IDT72V8980PV IDT72V8980J8 IDT72V8980PV8 72V8980_DS_70357
OCR Text	...ately following but in the next timeslot allocated to the output channel, one frame later. Whether information can be output during a following timeslot after the information entered the IDT72V8980 depends on which RX stream the channel inf...
Description	From old datasheet system 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 256 x 256 256 x 256 TSI, 8 I/O at 2Mbps, Variable Delay, 3.3V
File Size	106.69K / 11 Page	View it Online	Download Datasheet

				Integrated Device Technology IDT
Part No.	IDT72V8981 IDT72V8981DB IDT72V8981J IDT72V8981J8 72V8981_DS_96029
OCR Text	...an be output during a following timeslot after the information entered the IDT72V8981 depends on which RX stream the channel information enters on and which TX stream the information leaves on. This is caused by the order in which input str...
Description	From old datasheet system 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 128 x 128 128 x 128 TSI, 4 I/O at 2Mbps, Variable Delay, 3.3V
File Size	101.36K / 11 Page	View it Online	Download Datasheet

				ZARLINK[Zarlink Semiconductor Inc]
Part No.	ZL38010DCF ZL38010DCE1 ZL38010DCE ZL38010DCF1 MT91L60 ZL38010
OCR Text	...M words are assigned to the I/O timeslot defined by ENB2 when SEL=1 and by ENB1 when SEL=0. See Figure 4. ST-BUS operation- in 16 kbps transcoding mode, the ADPCM words are assigned to the B2 timeslot when SEL=1 and to the B1 timeslot when ...
Description	Low Power Quad ADPCM Transcoder
File Size	503.29K / 27 Page	View it Online	Download Datasheet

				ZARLINK[Zarlink Semiconductor Inc]
Part No.	MT9160AN1 MT91L61ASR1 MT91L60 MT91L60AE MT91L60AN MT91L60AS MT91L60ASR MT91L61 MT91L61AE MT91L61AN MT91L61AS MT91L61ASR
OCR Text	...dge of the bit clock during the timeslot defined by STB, or according to standard ST-BUS timing. 10 12 11 13 3 Zarlink Semiconductor Inc. MT91L60/61 Pin Description (continued) Pin # 20 Pin24 Pin 12 14 Name Din Descripti...
Description	3 Volt Multi-Featured Codec (MFC)
File Size	515.15K / 33 Page	View it Online	Download Datasheet

For timeslot Found Datasheets File :: 346 Search Time::2.781ms
Page :: | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | <11> | 12 | 13 | 14 | 15 |