|
|
![](images/bg04.gif) |
Xilinx
|
Part No. |
XC3SD1800A
|
OCR Text |
...es ? dedicated 18-bit by 18-bit multiplier ? available pipeline stages for enhanced performance of at least 250 mhz in the standard -4 speed grade ? 48-bit accumulator for multiply-accumulate (mac) operation ? integration added for complex... |
Description |
(XC3SD1800A / XC3SD3400A) Spatran-3A DSP FPGA Family
|
File Size |
1,466.82K /
98 Page |
View
it Online |
Download Datasheet
|
|
|
![](images/bg04.gif) |
Mitel Networks, Corp.
|
Part No. |
PDSP16256 PDSP16256AC1R PDSP16256C0
|
OCR Text |
multiplier - accumulators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. input data and coefficients are ...accumulator overflow. the 32-bit results are passed between cascaded devices without any intermediat... |
Description |
Programmable FIR Filter(可编程快速脉冲响应(FIR)滤波器) 可编程FIR滤波器(可编程快速脉冲响应时(FIR)滤波器 Programmable FIR Filter 可编程FIR滤波
|
File Size |
429.47K /
28 Page |
View
it Online |
Download Datasheet
|
|
|
![](images/bg04.gif) |
Zarlink
|
Part No. |
PDSP16256A PDSP16256
|
OCR Text |
...
The PDSP16256 contains sixteen multiplier accumulators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. In...accumulator overflow. The 32-bit results are passed between cascaded devices without any intermediat... |
Description |
Programmable FIR Filter
|
File Size |
196.27K /
25 Page |
View
it Online |
Download Datasheet
|
|
|
![](images/bg04.gif) |
Mitsubishi Electric Corporation
|
Part No. |
M32182F3TFP M32182F3VFP
|
OCR Text |
...tes) m32r-fpu core (max. 80mhz) multiplier accumulator (32x16+56) dmac (10 channels) input/output timer (37 channels) serial i/o (4 channels) a-d converter (a-d0 : 10-bit,12 channels) wait controller interupt controller (8 priority levels) ... |
Description |
M32R/32182 Group - Single Chip Microcomputers
|
File Size |
284.39K /
33 Page |
View
it Online |
Download Datasheet
|
|
|
![](images/bg04.gif) |
INTERSIL[Intersil Corporation]
|
Part No. |
HSP4322004 HSP43220JC-33 HSP43220 HSP43220JC-25
|
OCR Text |
...ts instead of a large number of multiplier/ accumulators that would be required using a standard FIR filter. The HDF is divided into 4 secti...accumulator) stages, which implement a low pass filter. Each accumulator is implemented as an adder ... |
Description |
Decimating Digital Filter
|
File Size |
269.48K /
18 Page |
View
it Online |
Download Datasheet
|
|
![](images/findchips_sm.gif)
Price and Availability
|