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Integrated Device Techn...
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Part No. |
9ZXL1251
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OCR Text |
...ut delay variation <50ps ? pcie gen3 phase jitter <1.0ps rms block diagram logic dif(11:0) hibw_bypm_lobw# smbdat smbclk ckpwrgd/pd# smb_a0_tri smb_a1_tri 100m_133m# z-pll (ss compatible) dfb_out_nc dif_in dif_in# oe(11:0)#
db1200zl deriv... |
Description |
Space-saving 64-pin VFQFPN package
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File Size |
374.00K /
20 Page |
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it Online |
Download Datasheet
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Discera
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Part No. |
DSC557-03
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OCR Text |
... meeting gen1, gen2, and gen3 specifications . the clock generator uses proven silicon mems technology to provide 100mhz* differential output clocks with excellent jitter and stability over a wide range of... |
Description |
Crystal-less Two Output PCIe Gen1/2/3 Clock Generator
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File Size |
564.10K /
9 Page |
View
it Online |
Download Datasheet
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Price and Availability
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