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Linear Technology Corporation
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Part No. |
LTC6994-1
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OCR Text |
...T) follows the input (IN) after delaying the rising and/or falling transitions. The LTC6994-1 will delay the rising or falling edge. The LTC6994-2 will delay both transitions, and adds the option to invert the output.
DEVICE LTC6994-1 LTC6... |
Description |
Delay Block / Debouncer
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File Size |
379.92K /
24 Page |
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Xilinx
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Part No. |
XC3S100E XC3S1200E XC3S1600E
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OCR Text |
...al solutions for distributing, delaying, multiplying, dividing, and phase-shifting clock signals. these elements are organized as shown in figure 1 . a ring of iobs surrounds a regular array of clbs. each device has two columns of block ... |
Description |
(XC3Sxx00E) Spartan-3E FPGA Family
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File Size |
1,750.15K /
193 Page |
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Xilinx, Inc.
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Part No. |
XC3S1000-4CP132C XC3S1000-4TQ144I XC3S1000-4PQ208C XC3S1000-4CP132I XC3S1000-4VQ100C XC3S1000-4PQ208I XC3S1000-4TQ144C XC3S1000-4VQG100C XC3S1000-4VQ100I XC3S1000-4VQG100I XC3S1000-5CP132C XC3S1000-4CPG132C XC3S1000-4TQG144I
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OCR Text |
...tal solutions for distributing, delaying, multiplying, dividing, and phase shifting clock signals. these elements are organized as shown in figure 1 . a ring of iobs surrounds a regular array of clbs. the xc3s50 has a single column of bloc... |
Description |
Spartan-3 FPGA Family: Complete Data Sheet FPGA, 192 CLBS, 50000 GATES, PBGA132 Spartan-3 FPGA Family: Complete Data Sheet FPGA, 192 CLBS, 50000 GATES, PQFP100 Spartan-3 FPGA Family: Complete Data Sheet FPGA, 192 CLBS, 50000 GATES, PQFP144
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File Size |
1,658.59K /
198 Page |
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Xilinx, Inc.
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Part No. |
XC3S1000-4FG900C XC3S1000-4FG676I XC3S1000-4FG456I XC3S1000-4FT256I XC3S1000-4FG456C XC3S1000-4FT256C XC3S1000-4FG320I XC3S1000-4FG676C XC3S1000-4FG900I XC3S1000-4FG320C
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OCR Text |
...tal solutions for distributing, delaying, multiplying, dividing, and phase shifting clock signals. these elements are organized as shown in figure 1 . a ring of iobs surrounds a regular array of clbs. the xc3s50 has a single column of bloc... |
Description |
Spartan-3 FPGA Family : Complete Data Sheet FPGA, 1920 CLBS, 1000000 GATES, 630 MHz, PBGA256
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File Size |
1,605.91K /
192 Page |
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Intel Corp. Intel, Corp.
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Part No. |
82C288 M82C288
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OCR Text |
...n. cmdly i command delay allows delaying the start of a command. cmdly is an active high input. if sampled high, the command output is not activated and cmdly is again sampled at the next clk cycle. when sampled low the selected command is ... |
Description |
BUS CONTROLLER FOR M80286 PROCESSORS 总线控制器的M80286处理
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File Size |
329.86K /
20 Page |
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SGS Thomson Microelectronics
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Part No. |
AN1546
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OCR Text |
...rovides a proper supply voltage delaying the sec pins voltage compared to the secondary winding voltage in order to avoid hard switching condition. the start- up network is made up by resistor r2 and the capacitor c8. during steady state th... |
Description |
VIPOWER: SELF OSCILLATING CONVERTER USING VK05CFL FOR COMPACT FLUORESCENT LAMPS
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File Size |
216.91K /
16 Page |
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Gennum Corporation
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Part No. |
GB3212
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OCR Text |
...cr ophone output is obtained by delaying the rear microphone si gnal and subtracting it from the front microphone signal. various microphone response patterns can be obtained by adjusting the time delay. the frontwave? circuit also provides... |
Description |
DUETDIGITAL Advanced DSP System with FRONTWAVE
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File Size |
113.51K /
10 Page |
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