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| Part No. |
XRT94L3307 XRT94L33IB
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| OCR Text |
...33 uses the internal e3/ds3 de- synchronizer circuit with an internal pointer leak algorithm for clock smoothing as well as to remove the jitter due to mapping and pointer movements. these de-synchronizer circuits do not need any extern... |
| Description |
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - ATM REGISTERS
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| File Size |
3,989.81K /
862 Page |
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http://
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| Part No. |
XRT94L3107 XRT94L31IB
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| OCR Text |
...31 uses the internal e3/ds3 de- synchronizer circuit with an internal pointer leak algorithm for clock smoothing as well as to remove the jitter due to mapping and pointer movements. these de-synchronizer circuits do not need any extern... |
| Description |
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
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| File Size |
1,060.48K /
133 Page |
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Matsshita / Panasonic
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| Part No. |
MN673744HL
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synchronizer Functions Built into Single Chip
Video Digital Conversion LSI MN673744(HL)
Overview
Analog video signals, such as NTSC and PAL analog video signals, are input into the MN673744(HL) and converted into Rec.656 output signals... |
| Description |
Video Digital Conversion LSI
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| File Size |
75.31K /
2 Page |
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NXP Semiconductors
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| Part No. |
P32P4910 P32P4910A
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... qualifier, 8,9 gcr endec, data synchronizer, time base generator, and 4-burst servo. programmable functions such as data rate, filter cutoff, filter boost, etc., are controlled by writing to the serial port registers so no external compone... |
| Description |
PRML Read Channel with PR4, 8/9 ENDEC, 4-Burst Servo
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| File Size |
337.28K /
64 Page |
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Zarlink Semiconductor Inc.
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| Part No. |
MT9040
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...ription the mt9040 t1/e1 system synchronizer contains a digital phase-locked loop (dpll), which provides timing and synchronization signals for t1 and e1 primary rate transmission links. the mt9040 generates st-bus clock and framing signa... |
| Description |
T1/E1 synchronizer
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| File Size |
244.63K /
27 Page |
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