| |
|
 |
AMCC
|
| Part No. |
S2204
|
| OCR Text |
...iety of options regarding input clocking and loopback. The transmitters operate at 1.250 GHz, 10 or 20 times the reference clock frequency.
...timing of the S2204 is performed during reset. Once synchronized, the user must insure that the timi... |
| Description |
Quad Gigabit Ethernet Device
|
| File Size |
406.13K /
33 Page |
View
it Online |
Download Datasheet
|
| |
|
 |
AMCC
|
| Part No. |
S2202
|
| OCR Text |
...iety of options regarding input clocking and loopback. The transmitters operate at 1.250 GHz, 10 or 20 times the reference clock frequency.
...timing of the S2202 is performed during reset. Once synchronized, the user must ensure that the timi... |
| Description |
Dual Gigabit Ethernet Device
|
| File Size |
292.02K /
28 Page |
View
it Online |
Download Datasheet
|
| |
|
 |
Wolfson Microelectronics
|
| Part No. |
WM8960
|
| OCR Text |
..., supporting most commonly-used clocking * Analogue 2.7V to 3.6V (Speaker supply up to 5.5V) www.DataSheet4U.com schemes. * Digital core and...TIMING REQUIREMENTS .....................................................................12
SYSTEM ... |
| Description |
Stereo CODEC
|
| File Size |
1,090.25K /
88 Page |
View
it Online |
Download Datasheet
|
| |
|
 |
Infineon
|
| Part No. |
V23815-K1306-M230 V23814-K1306-M230 M230
|
| OCR Text |
...data rate up to 11 Gbit/s * Two clocking modes can be selected * Transmission distance depends on data rate and fiber skew, up to 75 m at ma...Timing diagram Fig. 2. Multiplexing and Encoding The electrical input data is strobed into the input... |
| Description |
Parallel Optical Link: PAROLI Rx DC/DEMUX-DEC Parallel Optical Link: PAROLI Tx DC/MUX-ENC From old datasheet system
|
| File Size |
177.89K /
12 Page |
View
it Online |
Download Datasheet
|
| |
|
 |
Cypress Semiconductor, Corp.
|
| Part No. |
CY37128VP84-83YMB CY37128P84-125YMB CY37128P84-100YMB
|
| OCR Text |
...ong local macrocells flexible clocking ? 4 synchronous clocks per device ? product term clocking ? clock polarity control per logic block...timing changes. the cypress isr function is implemented through a jtag-compli- ant serial interface.... |
| Description |
EE PLD, 15 ns, CQCC84 CERAMIC, LCC-84 EE PLD, 10 ns, CQCC84 CERAMIC, LCC-84 EE PLD, 12 ns, CQCC84 CERAMIC, LCC-84
|
| File Size |
1,266.32K /
66 Page |
View
it Online |
Download Datasheet
|
|

Price and Availability
|